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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
	Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
	Pavel Machek <pavel@denx.de>
Cc: Biju Das <biju.das.jz@bp.renesas.com>
Subject: [RFC PATCH 5.10.y-cip 36/39] riscv: dts: renesas: Clean up dtbs_check W=1 warning due to empty phy node
Date: Tue, 30 Jan 2024 20:33:43 +0000	[thread overview]
Message-ID: <20240130203346.94488-37-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)
In-Reply-To: <20240130203346.94488-1-prabhakar.mahadev-lad.rj@bp.renesas.com>

From: Conor Dooley <conor.dooley@microchip.com>

commit 7a98d75c4a63a90e81178170b748512e7a23417d upstream.

dtbs_check w/ W=1 complains:

    Warning (unit_address_vs_reg): /soc/ethernet@11c20000/ethernet-phy@7: node has a unit name, but no reg or ranges property
    Warning (avoid_unnecessary_addr_size): /soc/ethernet@11c20000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

The ethernet@11c20000 node is guarded by an `#if (!SW_ET0_EN_N)` in
rzg2ul-smarc-som.dtsi, where the phy child node is added. In
rzfive-smarc-som.dtsi, the ethernet node is marked disabled & the
interrupt properties are deleted from the phy child node. As a result,
the produced dts looks like:

    ethernet@11c20000 {
	    compatible = "renesas,r9a07g043-gbeth",
	    		 "renesas,rzg2l-gbeth";
	    /* snip */
	    #address-cells = <1>;
	    #size-cells = <0>;
	    status = "disabled";

	    ethernet-phy@7 {
	    };
    };

Adding a corresponding `#if (!SW_ET0_EN_N)` around the node in
rzfive-smarc-som.dtsi avoids the complaint, as the empty child node is
not added:

    ethernet@11c20000 {
	    compatible = "renesas,r9a07g043-gbeth",
	    		 "renesas,rzg2l-gbeth";
	    /* snip */
	    #address-cells = <1>;
	    #size-cells = <0>;
	    status = "disabled";
    };

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230712-squealer-walmart-9587342ddec1@wendy
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
index d6f18754eb5d7..c62debc7ca7e4 100644
--- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
+++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
@@ -22,6 +22,7 @@ &dmac {
 	status = "disabled";
 };
 
+#if (!SW_ET0_EN_N)
 &eth0 {
 	status = "disabled";
 
@@ -30,6 +31,7 @@ phy0: ethernet-phy@7 {
 		/delete-property/ interrupts;
 	};
 };
+#endif
 
 &eth1 {
 	status = "disabled";
-- 
2.34.1



  parent reply	other threads:[~2024-01-30 20:35 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-30 20:33 [RFC PATCH 5.10.y-cip 00/39] Add support for Renesas RZ/Five RISC-V SoC Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 01/39] cacheinfo: clear cache_leaves(cpu) in free_cache_attributes() Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 02/39] riscv: Kconfig: Enable cpufreq kconfig menu Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 03/39] dma-direct: add support for dma_coherent_default_memory Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 04/39] dma-mapping: allow using the global coherent pool for !ARM Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 05/39] dma-mapping: simplify dma_init_coherent_memory Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 06/39] dma-mapping: add a dma_init_global_coherent helper Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 07/39] dma-mapping: make the global coherent pool conditional Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 08/39] of: also handle dma-noncoherent in of_dma_is_coherent() Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 09/39] of/irq: Use interrupts-extended to find parent Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 10/39] irqchip/sifive-plic: Improve naming scheme for per context offsets Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 11/39] irqchip/sifive-plic: Disable S-mode IRQs if running in M-mode Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 12/39] irqchip/sifive-plic: Add support for Renesas RZ/Five SoC Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 13/39] irqchip/sifive-plic: Make better use of the effective affinity mask Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 14/39] irqchip/sifive-plic: Separate the enable and mask operations Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 15/39] clocksource/drivers/renesas-ostm: Add support for RZ/V2L SoC Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 16/39] clocksource/drivers/riscv: Increase the clock source rating Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 17/39] clocksource/drivers/riscv: Get rid of clocksource_arch_init() callback Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 18/39] mmc: host: Kconfig: Make MMC_SDHI_INTERNAL_DMAC config option dependant on ARCH_RENESAS Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 19/39] dt-bindings: riscv: Sort the CPU core list alphabetically Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 20/39] dt-bindings: riscv: Add Andes AX45MP core to the list Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 21/39] dt-bindings: clock: r9a07g043-cpg: Add Renesas RZ/Five CPG Clock and Reset Definitions Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 22/39] dt-bindings: cache: andestech,ax45mp-cache: Add DT binding documentation for L2 cache controller Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 23/39] soc: renesas: Identify RZ/Five SoC Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 24/39] clk: renesas: r9a07g043: Add support for " Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 25/39] cache: Add L2 cache management for Andes AX45MP RISC-V core Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 26/39] cache: ax45mp_cache: Add non coherent support Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 27/39] soc: renesas: Kconfig: Select the required configs for RZ/Five SoC Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 28/39] riscv: Kconfig.socs: Add ARCH_RENESAS kconfig option Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 29/39] riscv: dts: renesas: Add initial devicetree for Renesas RZ/Five SoC Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 30/39] riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 31/39] riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 32/39] riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 33/39] riscv: dts: renesas: rzfive-smarc-som: Enable WDT Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 34/39] riscv: dts: renesas: rzfive-smarc-som: Enable OSTM nodes Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 35/39] riscv: dts: renesas: rzfive-smarc-som: Drop PHY interrupt support for ETH{0,1} Lad Prabhakar
2024-01-30 20:33 ` Lad Prabhakar [this message]
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 37/39] riscv: dts: renesas: r9a07g043f: Add L2 cache node Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 38/39] riscv: dts: renesas: r9a07g043f: Add dma-noncoherent property Lad Prabhakar
2024-01-30 20:33 ` [RFC PATCH 5.10.y-cip 39/39] riscv: dts: renesas: rzfive-smarc: Enable the blocks which were explicitly disabled Lad Prabhakar
2024-01-31 11:33 ` [RFC PATCH 5.10.y-cip 00/39] Add support for Renesas RZ/Five RISC-V SoC Pavel Machek
2024-02-01 12:09   ` [cip-dev] " Chris Paterson
2024-02-05  9:45   ` Prabhakar Mahadev Lad
2024-02-05 10:14     ` Pavel Machek
2024-02-05 10:26       ` Prabhakar Mahadev Lad
2024-02-05 10:29         ` Pavel Machek
2024-02-05 10:31           ` Prabhakar Mahadev Lad

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