[RFC 09/26] KVM: x86: cpuid: Define CPUID 0x06.eax by kvm_cpu_cap_mask()

[Zhao Liu <zhao1.liu@linux.intel.com>]

From: Zhao Liu <zhao1.liu@intel.com>

PTS, HFI, and ITD feature bits are to be specified in kvm_cpu_caps and
depend on Host support.

Define kvm_cpu_caps[CPUID_6_EAX] with kvm_cpu_cap_mask() and use this
0x06 cap feature to set the 0x06 leaf of the guest.

Currently, only ARAT is supported in 0x06.eax. Although ARAT is not
available on all CPUs with VMX support[1], commit e453aa0f7e7b ("KVM:
x86: Allow ARAT CPU feature") always sets ARAT for Guest because the
APIC timer is emulated.

Explicitly check ARAT in __do_cpuid_func() and make sure this feature
bit is always set.

[1]: https://lore.kernel.org/kvm/1523455369.20087.16.camel@intel.com/

Tested-by: Yanting Jiang <yanting.jiang@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
 arch/x86/kvm/cpuid.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 829bb9c6516f..d8cfae17cc92 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -628,6 +628,10 @@ void kvm_set_cpu_caps(void)
 		0 /* HTT */ | F(ACC) | 0 /* Reserved, PBE */
 	);
 
+	kvm_cpu_cap_mask(CPUID_6_EAX,
+		F(ARAT)
+	);
+
 	kvm_cpu_cap_mask(CPUID_7_0_EBX,
 		F(FSGSBASE) | F(SGX) | F(BMI1) | F(HLE) | F(AVX2) |
 		F(FDP_EXCPTN_ONLY) | F(SMEP) | F(BMI2) | F(ERMS) | F(INVPCID) |
@@ -964,7 +968,12 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
 		}
 		break;
 	case 6: /* Thermal management */
-		entry->eax = 0x4; /* allow ARAT */
+		cpuid_entry_override(entry, CPUID_6_EAX);
+
+		/* Always allow ARAT since APICs are emulated. */
+		if (!kvm_cpu_cap_has(X86_FEATURE_ARAT))
+			entry->eax |= 0x4;
+
 		entry->ebx = 0;
 		entry->ecx = 0;
 		entry->edx = 0;
-- 
2.34.1