From: Tudor Ambarus <tudor.ambarus@linaro.org> To: broonie@kernel.org, robh@kernel.org, andi.shyti@kernel.org, semen.protsenko@linaro.org Cc: krzysztof.kozlowski@linaro.org, alim.akhtar@samsung.com, linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, kernel-team@android.com, willmcvicker@google.com, conor+dt@kernel.org, devicetree@vger.kernel.org, arnd@arndb.de, Tudor Ambarus <tudor.ambarus@linaro.org> Subject: [PATCH 06/12] spi: s3c64xx: allow FIFO depth to be determined from the compatible Date: Thu, 8 Feb 2024 13:50:39 +0000 [thread overview] Message-ID: <20240208135045.3728927-7-tudor.ambarus@linaro.org> (raw) In-Reply-To: <20240208135045.3728927-1-tudor.ambarus@linaro.org> There are SoCs that use the same FIFO depth for all the instances of the SPI IP. See the fifo_lvl_mask defined for gs101 for example: .fifo_lvl_mask = { 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f}, Instead of specifying the FIFO depth with the same value for all 16 nodes in this case, allow such SoCs to infer the FIFO depth from the compatible. There are other SoCs than can benefit of this, see: {gs101, fsd, exynos850, s3c641, s3c2443}_spi_port_config. The FIFO depth inferred from the compatible has a higher precedence than the one that might be specified via device tree, the driver shall know better. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> --- drivers/spi/spi-s3c64xx.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index b1c63f75021d..68f95c04d092 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -137,6 +137,7 @@ struct s3c64xx_spi_dma_data { * struct s3c64xx_spi_port_config - SPI Controller hardware info * @fifo_lvl_mask: Bit-mask for {TX|RX}_FIFO_LVL bits in SPI_STATUS register. * @rx_lvl_offset: Bit offset of RX_FIFO_LVL bits in SPI_STATUS regiter. + * @fifo_depth: depth of the FIFO. * @rx_fifomask: SPI_STATUS.RX_FIFO_LVL mask. Shifted mask defining the field's * length and position. * @tx_fifomask: SPI_STATUS.TX_FIFO_LVL mask. Shifted mask defining the field's @@ -159,6 +160,7 @@ struct s3c64xx_spi_dma_data { struct s3c64xx_spi_port_config { int fifo_lvl_mask[MAX_SPI_PORTS]; int rx_lvl_offset; + unsigned int fifo_depth; u32 rx_fifomask; u32 tx_fifomask; int tx_st_done; @@ -1263,8 +1265,10 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) sdd->port_id = pdev->id; } - if (of_property_read_u32(pdev->dev.of_node, "fifo-depth", - &sdd->fifo_depth)) + if (sdd->port_conf->fifo_depth) + sdd->fifo_depth = sdd->port_conf->fifo_depth; + else if (of_property_read_u32(pdev->dev.of_node, "fifo-depth", + &sdd->fifo_depth)) sdd->fifo_depth = FIFO_DEPTH(sdd); s3c64xx_spi_set_fifomask(sdd); -- 2.43.0.687.g38aa6559b0-goog
WARNING: multiple messages have this Message-ID (diff)
From: Tudor Ambarus <tudor.ambarus@linaro.org> To: broonie@kernel.org, robh@kernel.org, andi.shyti@kernel.org, semen.protsenko@linaro.org Cc: krzysztof.kozlowski@linaro.org, alim.akhtar@samsung.com, linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, kernel-team@android.com, willmcvicker@google.com, conor+dt@kernel.org, devicetree@vger.kernel.org, arnd@arndb.de, Tudor Ambarus <tudor.ambarus@linaro.org> Subject: [PATCH 06/12] spi: s3c64xx: allow FIFO depth to be determined from the compatible Date: Thu, 8 Feb 2024 13:50:39 +0000 [thread overview] Message-ID: <20240208135045.3728927-7-tudor.ambarus@linaro.org> (raw) In-Reply-To: <20240208135045.3728927-1-tudor.ambarus@linaro.org> There are SoCs that use the same FIFO depth for all the instances of the SPI IP. See the fifo_lvl_mask defined for gs101 for example: .fifo_lvl_mask = { 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f}, Instead of specifying the FIFO depth with the same value for all 16 nodes in this case, allow such SoCs to infer the FIFO depth from the compatible. There are other SoCs than can benefit of this, see: {gs101, fsd, exynos850, s3c641, s3c2443}_spi_port_config. The FIFO depth inferred from the compatible has a higher precedence than the one that might be specified via device tree, the driver shall know better. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> --- drivers/spi/spi-s3c64xx.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index b1c63f75021d..68f95c04d092 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -137,6 +137,7 @@ struct s3c64xx_spi_dma_data { * struct s3c64xx_spi_port_config - SPI Controller hardware info * @fifo_lvl_mask: Bit-mask for {TX|RX}_FIFO_LVL bits in SPI_STATUS register. * @rx_lvl_offset: Bit offset of RX_FIFO_LVL bits in SPI_STATUS regiter. + * @fifo_depth: depth of the FIFO. * @rx_fifomask: SPI_STATUS.RX_FIFO_LVL mask. Shifted mask defining the field's * length and position. * @tx_fifomask: SPI_STATUS.TX_FIFO_LVL mask. Shifted mask defining the field's @@ -159,6 +160,7 @@ struct s3c64xx_spi_dma_data { struct s3c64xx_spi_port_config { int fifo_lvl_mask[MAX_SPI_PORTS]; int rx_lvl_offset; + unsigned int fifo_depth; u32 rx_fifomask; u32 tx_fifomask; int tx_st_done; @@ -1263,8 +1265,10 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) sdd->port_id = pdev->id; } - if (of_property_read_u32(pdev->dev.of_node, "fifo-depth", - &sdd->fifo_depth)) + if (sdd->port_conf->fifo_depth) + sdd->fifo_depth = sdd->port_conf->fifo_depth; + else if (of_property_read_u32(pdev->dev.of_node, "fifo-depth", + &sdd->fifo_depth)) sdd->fifo_depth = FIFO_DEPTH(sdd); s3c64xx_spi_set_fifomask(sdd); -- 2.43.0.687.g38aa6559b0-goog _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-02-08 13:51 UTC|newest] Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-02-08 13:50 [PATCH 00/12] spi: s3c64xx: remove OF alias ID dependency Tudor Ambarus 2024-02-08 13:50 ` Tudor Ambarus 2024-02-08 13:50 ` [PATCH 01/12] spi: dt-bindings: introduce the ``fifo-depth`` property Tudor Ambarus 2024-02-08 13:50 ` Tudor Ambarus 2024-02-08 18:24 ` Conor Dooley 2024-02-08 18:24 ` Conor Dooley 2024-02-09 13:56 ` Tudor Ambarus 2024-02-09 13:56 ` Tudor Ambarus 2024-02-09 16:21 ` Conor Dooley 2024-02-09 16:21 ` Conor Dooley 2024-02-09 16:55 ` Tudor Ambarus 2024-02-09 16:55 ` Tudor Ambarus 2024-02-12 10:38 ` Geert Uytterhoeven 2024-02-12 10:38 ` Geert Uytterhoeven 2024-02-12 12:01 ` Tudor Ambarus 2024-02-12 12:01 ` Tudor Ambarus 2024-02-09 17:41 ` Mark Brown 2024-02-09 17:41 ` Mark Brown 2024-02-09 17:13 ` Geert Uytterhoeven 2024-02-09 17:13 ` Geert Uytterhoeven 2024-02-11 13:49 ` Krzysztof Kozlowski 2024-02-11 13:49 ` Krzysztof Kozlowski 2024-02-12 6:17 ` Tudor Ambarus 2024-02-12 6:17 ` Tudor Ambarus 2024-02-08 13:50 ` [PATCH 02/12] spi: s3c64xx: define a magic value Tudor Ambarus 2024-02-08 13:50 ` Tudor Ambarus 2024-02-08 13:50 ` [PATCH 03/12] spi: s3c64xx: allow full FIFO masks Tudor Ambarus 2024-02-08 13:50 ` Tudor Ambarus 2024-02-08 13:50 ` [PATCH 04/12] spi: s3c64xx: determine the fifo depth only once Tudor Ambarus 2024-02-08 13:50 ` Tudor Ambarus 2024-02-08 13:50 ` [PATCH 05/12] spi: s3c64xx: retrieve the FIFO depth from the device tree Tudor Ambarus 2024-02-08 13:50 ` Tudor Ambarus 2024-02-08 13:50 ` Tudor Ambarus [this message] 2024-02-08 13:50 ` [PATCH 06/12] spi: s3c64xx: allow FIFO depth to be determined from the compatible Tudor Ambarus 2024-02-08 13:50 ` [PATCH 07/12] spi: s3c64xx: let the SPI core determine the bus number Tudor Ambarus 2024-02-08 13:50 ` Tudor Ambarus 2024-02-08 13:50 ` [PATCH 08/12] spi: s3c64xx: introduce s3c64xx_spi_set_port_id() Tudor Ambarus 2024-02-08 13:50 ` Tudor Ambarus 2024-02-08 13:50 ` [PATCH 09/12] spi: s3c64xx: get rid of the OF alias ID dependency Tudor Ambarus 2024-02-08 13:50 ` Tudor Ambarus 2024-02-08 13:50 ` [PATCH 10/12] spi: s3c64xx: deprecate fifo_lvl_mask, rx_lvl_offset and port_id Tudor Ambarus 2024-02-08 13:50 ` Tudor Ambarus 2024-02-08 13:50 ` [PATCH 11/12] spi: s3c64xx: switch gs101 to new port config data Tudor Ambarus 2024-02-08 13:50 ` Tudor Ambarus 2024-02-08 16:01 ` Tudor Ambarus 2024-02-08 16:01 ` Tudor Ambarus 2024-02-08 13:50 ` [PATCH 12/12] spi: s3c64xx: switch exynos850 " Tudor Ambarus 2024-02-08 13:50 ` Tudor Ambarus
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