All of lore.kernel.org
 help / color / mirror / Atom feed
From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: broonie@kernel.org, robh@kernel.org, andi.shyti@kernel.org,
	krzysztof.kozlowski@linaro.org, semen.protsenko@linaro.org,
	conor+dt@kernel.org
Cc: alim.akhtar@samsung.com, linux-spi@vger.kernel.org,
	linux-samsung-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, andre.draszik@linaro.org,
	peter.griffin@linaro.org, kernel-team@android.com,
	willmcvicker@google.com, devicetree@vger.kernel.org,
	arnd@arndb.de, Tudor Ambarus <tudor.ambarus@linaro.org>
Subject: [PATCH v2 01/12] spi: dt-bindings: introduce FIFO depth properties
Date: Mon, 12 Feb 2024 14:03:20 +0000	[thread overview]
Message-ID: <20240212140331.915498-2-tudor.ambarus@linaro.org> (raw)
In-Reply-To: <20240212140331.915498-1-tudor.ambarus@linaro.org>

There are SPI IPs that can be configured by the integrator with a
specific FIFO depth depending on the system's capabilities. For example,
the samsung USI SPI IP can be configured by the integrator with a TX/RX
FIFO from 8 byte to 256 bytes.

Introduce the ``fifo-depth`` property for such instances of IPs where the
same FIFO depth is used for both RX and TX. Introduce ``rx-fifo-depth``
and ``tx-fifo-depth`` properties for cases where the RX FIFO depth is
different from the TX FIFO depth.

Make the dedicated RX/TX properties dependent on each other and mutual
exclusive with the other.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
 .../bindings/spi/spi-controller.yaml          | 27 +++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml
index 524f6fe8c27b..add39884d226 100644
--- a/Documentation/devicetree/bindings/spi/spi-controller.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml
@@ -69,6 +69,21 @@ properties:
          Should be generally avoided and be replaced by
          spi-cs-high + ACTIVE_HIGH.
 
+  fifo-depth:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Size of the RX and TX data FIFOs in bytes.
+
+  rx-fifo-depth:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Size of the RX data FIFO in bytes.
+
+  tx-fifo-depth:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Size of the TX data FIFO in bytes.
+
   num-cs:
     $ref: /schemas/types.yaml#/definitions/uint32
     description:
@@ -116,6 +131,10 @@ patternProperties:
       - compatible
       - reg
 
+dependencies:
+  rx-fifo-depth: [ tx-fifo-depth ]
+  tx-fifo-depth: [ rx-fifo-depth ]
+
 allOf:
   - if:
       not:
@@ -129,6 +148,14 @@ allOf:
       properties:
         "#address-cells":
           const: 0
+  - not:
+        required:
+          - fifo-depth
+          - rx-fifo-depth
+  - not:
+        required:
+          - fifo-depth
+          - tx-fifo-depth
 
 additionalProperties: true
 
-- 
2.43.0.687.g38aa6559b0-goog


WARNING: multiple messages have this Message-ID (diff)
From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: broonie@kernel.org, robh@kernel.org, andi.shyti@kernel.org,
	krzysztof.kozlowski@linaro.org, semen.protsenko@linaro.org,
	conor+dt@kernel.org
Cc: alim.akhtar@samsung.com, linux-spi@vger.kernel.org,
	linux-samsung-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, andre.draszik@linaro.org,
	peter.griffin@linaro.org, kernel-team@android.com,
	willmcvicker@google.com, devicetree@vger.kernel.org,
	arnd@arndb.de, Tudor Ambarus <tudor.ambarus@linaro.org>
Subject: [PATCH v2 01/12] spi: dt-bindings: introduce FIFO depth properties
Date: Mon, 12 Feb 2024 14:03:20 +0000	[thread overview]
Message-ID: <20240212140331.915498-2-tudor.ambarus@linaro.org> (raw)
In-Reply-To: <20240212140331.915498-1-tudor.ambarus@linaro.org>

There are SPI IPs that can be configured by the integrator with a
specific FIFO depth depending on the system's capabilities. For example,
the samsung USI SPI IP can be configured by the integrator with a TX/RX
FIFO from 8 byte to 256 bytes.

Introduce the ``fifo-depth`` property for such instances of IPs where the
same FIFO depth is used for both RX and TX. Introduce ``rx-fifo-depth``
and ``tx-fifo-depth`` properties for cases where the RX FIFO depth is
different from the TX FIFO depth.

Make the dedicated RX/TX properties dependent on each other and mutual
exclusive with the other.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
 .../bindings/spi/spi-controller.yaml          | 27 +++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml
index 524f6fe8c27b..add39884d226 100644
--- a/Documentation/devicetree/bindings/spi/spi-controller.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml
@@ -69,6 +69,21 @@ properties:
          Should be generally avoided and be replaced by
          spi-cs-high + ACTIVE_HIGH.
 
+  fifo-depth:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Size of the RX and TX data FIFOs in bytes.
+
+  rx-fifo-depth:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Size of the RX data FIFO in bytes.
+
+  tx-fifo-depth:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Size of the TX data FIFO in bytes.
+
   num-cs:
     $ref: /schemas/types.yaml#/definitions/uint32
     description:
@@ -116,6 +131,10 @@ patternProperties:
       - compatible
       - reg
 
+dependencies:
+  rx-fifo-depth: [ tx-fifo-depth ]
+  tx-fifo-depth: [ rx-fifo-depth ]
+
 allOf:
   - if:
       not:
@@ -129,6 +148,14 @@ allOf:
       properties:
         "#address-cells":
           const: 0
+  - not:
+        required:
+          - fifo-depth
+          - rx-fifo-depth
+  - not:
+        required:
+          - fifo-depth
+          - tx-fifo-depth
 
 additionalProperties: true
 
-- 
2.43.0.687.g38aa6559b0-goog


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2024-02-12 14:03 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-12 14:03 [PATCH v2 00/12] spi: s3c64xx: remove OF alias ID dependency Tudor Ambarus
2024-02-12 14:03 ` Tudor Ambarus
2024-02-12 14:03 ` Tudor Ambarus [this message]
2024-02-12 14:03   ` [PATCH v2 01/12] spi: dt-bindings: introduce FIFO depth properties Tudor Ambarus
2024-02-12 15:36   ` Rob Herring
2024-02-12 15:36     ` Rob Herring
2024-02-13  8:16     ` Tudor Ambarus
2024-02-13  8:16       ` Tudor Ambarus
2024-02-13 13:14   ` Rob Herring
2024-02-13 13:14     ` Rob Herring
2024-02-16  7:41   ` kernel test robot
2024-02-16  7:41     ` kernel test robot
2024-02-12 14:03 ` [PATCH v2 02/12] spi: s3c64xx: define a magic value Tudor Ambarus
2024-02-12 14:03   ` Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 03/12] spi: s3c64xx: allow full FIFO masks Tudor Ambarus
2024-02-12 14:03   ` Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 04/12] spi: s3c64xx: determine the fifo depth only once Tudor Ambarus
2024-02-12 14:03   ` Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 05/12] spi: s3c64xx: retrieve the FIFO depth from the device tree Tudor Ambarus
2024-02-12 14:03   ` Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 06/12] spi: s3c64xx: allow FIFO depth to be determined from the compatible Tudor Ambarus
2024-02-12 14:03   ` Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 07/12] spi: s3c64xx: let the SPI core determine the bus number Tudor Ambarus
2024-02-12 14:03   ` Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 08/12] spi: s3c64xx: introduce s3c64xx_spi_set_port_id() Tudor Ambarus
2024-02-12 14:03   ` Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 09/12] spi: s3c64xx: get rid of the OF alias ID dependency Tudor Ambarus
2024-02-12 14:03   ` Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 10/12] spi: s3c64xx: deprecate fifo_lvl_mask, rx_lvl_offset and port_id Tudor Ambarus
2024-02-12 14:03   ` Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 11/12] spi: s3c64xx: switch gs101 to new port config data Tudor Ambarus
2024-02-12 14:03   ` Tudor Ambarus
2024-02-12 14:03 ` [PATCH v2 12/12] spi: s3c64xx: switch exynos850 " Tudor Ambarus
2024-02-12 14:03   ` Tudor Ambarus

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240212140331.915498-2-tudor.ambarus@linaro.org \
    --to=tudor.ambarus@linaro.org \
    --cc=alim.akhtar@samsung.com \
    --cc=andi.shyti@kernel.org \
    --cc=andre.draszik@linaro.org \
    --cc=arnd@arndb.de \
    --cc=broonie@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=kernel-team@android.com \
    --cc=krzysztof.kozlowski@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-samsung-soc@vger.kernel.org \
    --cc=linux-spi@vger.kernel.org \
    --cc=peter.griffin@linaro.org \
    --cc=robh@kernel.org \
    --cc=semen.protsenko@linaro.org \
    --cc=willmcvicker@google.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.