From: Tudor Ambarus <tudor.ambarus@linaro.org> To: broonie@kernel.org, robh@kernel.org, andi.shyti@kernel.org, krzysztof.kozlowski@linaro.org, semen.protsenko@linaro.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, kernel-team@android.com, willmcvicker@google.com, devicetree@vger.kernel.org, Tudor Ambarus <tudor.ambarus@linaro.org> Subject: [PATCH v3 01/12] spi: dt-bindings: introduce FIFO depth properties Date: Fri, 16 Feb 2024 07:05:44 +0000 [thread overview] Message-ID: <20240216070555.2483977-2-tudor.ambarus@linaro.org> (raw) In-Reply-To: <20240216070555.2483977-1-tudor.ambarus@linaro.org> There are SPI IPs that can be configured by the integrator with a specific FIFO depth depending on the system's capabilities. For example, the samsung USI SPI IP can be configured by the integrator with a TX/RX FIFO from 8 byte to 256 bytes. Introduce the ``fifo-depth`` property for such instances of IPs where the same FIFO depth is used for both RX and TX. Introduce ``rx-fifo-depth`` and ``tx-fifo-depth`` properties for cases where the RX FIFO depth is different from the TX FIFO depth. Make the dedicated RX/TX properties dependent on each other and mutual exclusive with the other. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> --- .../bindings/spi/spi-controller.yaml | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml index 524f6fe8c27b..093150c0cb87 100644 --- a/Documentation/devicetree/bindings/spi/spi-controller.yaml +++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml @@ -69,6 +69,21 @@ properties: Should be generally avoided and be replaced by spi-cs-high + ACTIVE_HIGH. + fifo-depth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Size of the RX and TX data FIFOs in bytes. + + rx-fifo-depth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Size of the RX data FIFO in bytes. + + tx-fifo-depth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Size of the TX data FIFO in bytes. + num-cs: $ref: /schemas/types.yaml#/definitions/uint32 description: @@ -116,6 +131,10 @@ patternProperties: - compatible - reg +dependencies: + rx-fifo-depth: [ tx-fifo-depth ] + tx-fifo-depth: [ rx-fifo-depth ] + allOf: - if: not: @@ -129,6 +148,14 @@ allOf: properties: "#address-cells": const: 0 + - not: + required: + - fifo-depth + - rx-fifo-depth + - not: + required: + - fifo-depth + - tx-fifo-depth additionalProperties: true -- 2.44.0.rc0.258.g7320e95886-goog _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Tudor Ambarus <tudor.ambarus@linaro.org> To: broonie@kernel.org, robh@kernel.org, andi.shyti@kernel.org, krzysztof.kozlowski@linaro.org, semen.protsenko@linaro.org, conor+dt@kernel.org Cc: alim.akhtar@samsung.com, linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, andre.draszik@linaro.org, peter.griffin@linaro.org, kernel-team@android.com, willmcvicker@google.com, devicetree@vger.kernel.org, Tudor Ambarus <tudor.ambarus@linaro.org> Subject: [PATCH v3 01/12] spi: dt-bindings: introduce FIFO depth properties Date: Fri, 16 Feb 2024 07:05:44 +0000 [thread overview] Message-ID: <20240216070555.2483977-2-tudor.ambarus@linaro.org> (raw) In-Reply-To: <20240216070555.2483977-1-tudor.ambarus@linaro.org> There are SPI IPs that can be configured by the integrator with a specific FIFO depth depending on the system's capabilities. For example, the samsung USI SPI IP can be configured by the integrator with a TX/RX FIFO from 8 byte to 256 bytes. Introduce the ``fifo-depth`` property for such instances of IPs where the same FIFO depth is used for both RX and TX. Introduce ``rx-fifo-depth`` and ``tx-fifo-depth`` properties for cases where the RX FIFO depth is different from the TX FIFO depth. Make the dedicated RX/TX properties dependent on each other and mutual exclusive with the other. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> --- .../bindings/spi/spi-controller.yaml | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml index 524f6fe8c27b..093150c0cb87 100644 --- a/Documentation/devicetree/bindings/spi/spi-controller.yaml +++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml @@ -69,6 +69,21 @@ properties: Should be generally avoided and be replaced by spi-cs-high + ACTIVE_HIGH. + fifo-depth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Size of the RX and TX data FIFOs in bytes. + + rx-fifo-depth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Size of the RX data FIFO in bytes. + + tx-fifo-depth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Size of the TX data FIFO in bytes. + num-cs: $ref: /schemas/types.yaml#/definitions/uint32 description: @@ -116,6 +131,10 @@ patternProperties: - compatible - reg +dependencies: + rx-fifo-depth: [ tx-fifo-depth ] + tx-fifo-depth: [ rx-fifo-depth ] + allOf: - if: not: @@ -129,6 +148,14 @@ allOf: properties: "#address-cells": const: 0 + - not: + required: + - fifo-depth + - rx-fifo-depth + - not: + required: + - fifo-depth + - tx-fifo-depth additionalProperties: true -- 2.44.0.rc0.258.g7320e95886-goog
next prev parent reply other threads:[~2024-02-16 7:06 UTC|newest] Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-02-16 7:05 [PATCH v3 00/12] spi: s3c64xx: remove OF alias ID dependency Tudor Ambarus 2024-02-16 7:05 ` Tudor Ambarus 2024-02-16 7:05 ` Tudor Ambarus [this message] 2024-02-16 7:05 ` [PATCH v3 01/12] spi: dt-bindings: introduce FIFO depth properties Tudor Ambarus 2024-02-16 19:45 ` Conor Dooley 2024-02-16 19:45 ` Conor Dooley 2024-02-16 7:05 ` [PATCH v3 02/12] spi: s3c64xx: define a magic value Tudor Ambarus 2024-02-16 7:05 ` Tudor Ambarus 2024-02-16 7:05 ` [PATCH v3 03/12] spi: s3c64xx: allow full FIFO masks Tudor Ambarus 2024-02-16 7:05 ` Tudor Ambarus 2024-02-16 7:05 ` [PATCH v3 04/12] spi: s3c64xx: determine the fifo depth only once Tudor Ambarus 2024-02-16 7:05 ` Tudor Ambarus 2024-02-16 7:05 ` [PATCH v3 05/12] spi: s3c64xx: retrieve the FIFO depth from the device tree Tudor Ambarus 2024-02-16 7:05 ` Tudor Ambarus 2024-02-16 7:05 ` [PATCH v3 06/12] spi: s3c64xx: allow FIFO depth to be determined from the compatible Tudor Ambarus 2024-02-16 7:05 ` Tudor Ambarus 2024-02-16 7:05 ` [PATCH v3 07/12] spi: s3c64xx: let the SPI core determine the bus number Tudor Ambarus 2024-02-16 7:05 ` Tudor Ambarus 2024-02-16 7:05 ` [PATCH v3 08/12] spi: s3c64xx: introduce s3c64xx_spi_set_port_id() Tudor Ambarus 2024-02-16 7:05 ` Tudor Ambarus 2024-02-16 7:05 ` [PATCH v3 09/12] spi: s3c64xx: get rid of the OF alias ID dependency Tudor Ambarus 2024-02-16 7:05 ` Tudor Ambarus 2024-02-16 7:05 ` [PATCH v3 10/12] spi: s3c64xx: deprecate fifo_lvl_mask, rx_lvl_offset and port_id Tudor Ambarus 2024-02-16 7:05 ` Tudor Ambarus 2024-02-16 7:05 ` [PATCH v3 11/12] spi: s3c64xx: switch gs101 to new port config data Tudor Ambarus 2024-02-16 7:05 ` Tudor Ambarus 2024-02-16 7:05 ` [PATCH v3 12/12] spi: s3c64xx: switch exynos850 " Tudor Ambarus 2024-02-16 7:05 ` Tudor Ambarus 2024-02-21 17:56 ` Tudor Ambarus 2024-02-21 17:56 ` Tudor Ambarus 2024-02-24 23:59 ` Sam Protsenko 2024-02-24 23:59 ` Sam Protsenko 2024-03-06 14:08 ` [PATCH v3 00/12] spi: s3c64xx: remove OF alias ID dependency Mark Brown 2024-03-06 14:08 ` Mark Brown
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