From: Sam Protsenko <semen.protsenko@linaro.org> To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, Sylwester Nawrocki <s.nawrocki@samsung.com>, Chanwoo Choi <cw00.choi@samsung.com> Cc: Alim Akhtar <alim.akhtar@samsung.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Tomasz Figa <tomasz.figa@gmail.com>, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/16] clk: samsung: Use clk.h as a single header for Samsung CCF Date: Fri, 16 Feb 2024 16:32:37 -0600 [thread overview] Message-ID: <20240216223245.12273-9-semen.protsenko@linaro.org> (raw) In-Reply-To: <20240216223245.12273-1-semen.protsenko@linaro.org> Make both CPU and PLL clock headers to be included indirectly via clk.h. All Samsung clock drivers already include clk.h, which provides API for Samsung CCF clocks like muxes, gates, etc. Both CPU and PLL Samsung clock are not that different. It makes sense to only use both clk-cpu.h and clk-pll.h internally for Samsung CCF framework, and make clk.h the facade for Samsung CCF. This way all clock drivers only have to include clk.h. No functional change. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> --- drivers/clk/samsung/clk-cpu.c | 1 - drivers/clk/samsung/clk-exynos3250.c | 2 -- drivers/clk/samsung/clk-exynos4.c | 1 - drivers/clk/samsung/clk-exynos5250.c | 1 - drivers/clk/samsung/clk-exynos5260.c | 1 - drivers/clk/samsung/clk-exynos5420.c | 1 - drivers/clk/samsung/clk-exynos5433.c | 2 -- drivers/clk/samsung/clk-pll.c | 2 +- drivers/clk/samsung/clk-s3c64xx.c | 1 - drivers/clk/samsung/clk-s5pv210.c | 1 - drivers/clk/samsung/clk.h | 1 + 11 files changed, 2 insertions(+), 12 deletions(-) diff --git a/drivers/clk/samsung/clk-cpu.c b/drivers/clk/samsung/clk-cpu.c index a59949990919..4c46416281a3 100644 --- a/drivers/clk/samsung/clk-cpu.c +++ b/drivers/clk/samsung/clk-cpu.c @@ -36,7 +36,6 @@ #include <linux/clk-provider.h> #include "clk.h" -#include "clk-cpu.h" struct exynos_cpuclk; diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk-exynos3250.c index bf149fae04c3..d1b72a75bc5a 100644 --- a/drivers/clk/samsung/clk-exynos3250.c +++ b/drivers/clk/samsung/clk-exynos3250.c @@ -14,8 +14,6 @@ #include <dt-bindings/clock/exynos3250.h> #include "clk.h" -#include "clk-cpu.h" -#include "clk-pll.h" #define SRC_LEFTBUS 0x4200 #define DIV_LEFTBUS 0x4500 diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index d5b1e9f49d8b..3d57020a620f 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -16,7 +16,6 @@ #include <linux/of_address.h> #include "clk.h" -#include "clk-cpu.h" /* Exynos4 clock controller register offsets */ #define SRC_LEFTBUS 0x4200 diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 58df80de52ef..4953da754994 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -14,7 +14,6 @@ #include <linux/of_address.h> #include "clk.h" -#include "clk-cpu.h" #include "clk-exynos5-subcmu.h" #define APLL_LOCK 0x0 diff --git a/drivers/clk/samsung/clk-exynos5260.c b/drivers/clk/samsung/clk-exynos5260.c index 16da6ef5ca0c..280330ded100 100644 --- a/drivers/clk/samsung/clk-exynos5260.c +++ b/drivers/clk/samsung/clk-exynos5260.c @@ -11,7 +11,6 @@ #include "clk-exynos5260.h" #include "clk.h" -#include "clk-pll.h" #include <dt-bindings/clock/exynos5260-clk.h> diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index bd7b304d2c00..531ef1c3fa30 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -15,7 +15,6 @@ #include <linux/clk.h> #include "clk.h" -#include "clk-cpu.h" #include "clk-exynos5-subcmu.h" #define APLL_LOCK 0x0 diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index d3779eefb438..379744f0a5b6 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -17,9 +17,7 @@ #include <dt-bindings/clock/exynos5433.h> #include "clk.h" -#include "clk-cpu.h" #include "clk-exynos-arm64.h" -#include "clk-pll.h" /* NOTE: Must be equal to the last clock ID increased by one */ #define CLKS_NR_TOP (CLK_SCLK_HDMI_SPDIF_DISP + 1) diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c index 4bbdf5e91650..37aa7beb547a 100644 --- a/drivers/clk/samsung/clk-pll.c +++ b/drivers/clk/samsung/clk-pll.c @@ -14,8 +14,8 @@ #include <linux/timekeeping.h> #include <linux/clk-provider.h> #include <linux/io.h> + #include "clk.h" -#include "clk-pll.h" #define PLL_TIMEOUT_US 20000U #define PLL_TIMEOUT_LOOPS 1000000U diff --git a/drivers/clk/samsung/clk-s3c64xx.c b/drivers/clk/samsung/clk-s3c64xx.c index d27a1f73f077..8ee3ffdf2b8d 100644 --- a/drivers/clk/samsung/clk-s3c64xx.c +++ b/drivers/clk/samsung/clk-s3c64xx.c @@ -14,7 +14,6 @@ #include <dt-bindings/clock/samsung,s3c64xx-clock.h> #include "clk.h" -#include "clk-pll.h" /* S3C64xx clock controller register offsets. */ #define APLL_LOCK 0x000 diff --git a/drivers/clk/samsung/clk-s5pv210.c b/drivers/clk/samsung/clk-s5pv210.c index cd85342e4ddb..29f2531fd5d3 100644 --- a/drivers/clk/samsung/clk-s5pv210.c +++ b/drivers/clk/samsung/clk-s5pv210.c @@ -13,7 +13,6 @@ #include <linux/of_address.h> #include "clk.h" -#include "clk-pll.h" #include <dt-bindings/clock/s5pv210.h> diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h index 516b716407e5..8157479f45eb 100644 --- a/drivers/clk/samsung/clk.h +++ b/drivers/clk/samsung/clk.h @@ -11,6 +11,7 @@ #define __SAMSUNG_CLK_H #include <linux/clk-provider.h> +#include "clk-cpu.h" #include "clk-pll.h" /** -- 2.39.2
WARNING: multiple messages have this Message-ID (diff)
From: Sam Protsenko <semen.protsenko@linaro.org> To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, Sylwester Nawrocki <s.nawrocki@samsung.com>, Chanwoo Choi <cw00.choi@samsung.com> Cc: Alim Akhtar <alim.akhtar@samsung.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Tomasz Figa <tomasz.figa@gmail.com>, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/16] clk: samsung: Use clk.h as a single header for Samsung CCF Date: Fri, 16 Feb 2024 16:32:37 -0600 [thread overview] Message-ID: <20240216223245.12273-9-semen.protsenko@linaro.org> (raw) In-Reply-To: <20240216223245.12273-1-semen.protsenko@linaro.org> Make both CPU and PLL clock headers to be included indirectly via clk.h. All Samsung clock drivers already include clk.h, which provides API for Samsung CCF clocks like muxes, gates, etc. Both CPU and PLL Samsung clock are not that different. It makes sense to only use both clk-cpu.h and clk-pll.h internally for Samsung CCF framework, and make clk.h the facade for Samsung CCF. This way all clock drivers only have to include clk.h. No functional change. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> --- drivers/clk/samsung/clk-cpu.c | 1 - drivers/clk/samsung/clk-exynos3250.c | 2 -- drivers/clk/samsung/clk-exynos4.c | 1 - drivers/clk/samsung/clk-exynos5250.c | 1 - drivers/clk/samsung/clk-exynos5260.c | 1 - drivers/clk/samsung/clk-exynos5420.c | 1 - drivers/clk/samsung/clk-exynos5433.c | 2 -- drivers/clk/samsung/clk-pll.c | 2 +- drivers/clk/samsung/clk-s3c64xx.c | 1 - drivers/clk/samsung/clk-s5pv210.c | 1 - drivers/clk/samsung/clk.h | 1 + 11 files changed, 2 insertions(+), 12 deletions(-) diff --git a/drivers/clk/samsung/clk-cpu.c b/drivers/clk/samsung/clk-cpu.c index a59949990919..4c46416281a3 100644 --- a/drivers/clk/samsung/clk-cpu.c +++ b/drivers/clk/samsung/clk-cpu.c @@ -36,7 +36,6 @@ #include <linux/clk-provider.h> #include "clk.h" -#include "clk-cpu.h" struct exynos_cpuclk; diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk-exynos3250.c index bf149fae04c3..d1b72a75bc5a 100644 --- a/drivers/clk/samsung/clk-exynos3250.c +++ b/drivers/clk/samsung/clk-exynos3250.c @@ -14,8 +14,6 @@ #include <dt-bindings/clock/exynos3250.h> #include "clk.h" -#include "clk-cpu.h" -#include "clk-pll.h" #define SRC_LEFTBUS 0x4200 #define DIV_LEFTBUS 0x4500 diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index d5b1e9f49d8b..3d57020a620f 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -16,7 +16,6 @@ #include <linux/of_address.h> #include "clk.h" -#include "clk-cpu.h" /* Exynos4 clock controller register offsets */ #define SRC_LEFTBUS 0x4200 diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 58df80de52ef..4953da754994 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -14,7 +14,6 @@ #include <linux/of_address.h> #include "clk.h" -#include "clk-cpu.h" #include "clk-exynos5-subcmu.h" #define APLL_LOCK 0x0 diff --git a/drivers/clk/samsung/clk-exynos5260.c b/drivers/clk/samsung/clk-exynos5260.c index 16da6ef5ca0c..280330ded100 100644 --- a/drivers/clk/samsung/clk-exynos5260.c +++ b/drivers/clk/samsung/clk-exynos5260.c @@ -11,7 +11,6 @@ #include "clk-exynos5260.h" #include "clk.h" -#include "clk-pll.h" #include <dt-bindings/clock/exynos5260-clk.h> diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index bd7b304d2c00..531ef1c3fa30 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -15,7 +15,6 @@ #include <linux/clk.h> #include "clk.h" -#include "clk-cpu.h" #include "clk-exynos5-subcmu.h" #define APLL_LOCK 0x0 diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index d3779eefb438..379744f0a5b6 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -17,9 +17,7 @@ #include <dt-bindings/clock/exynos5433.h> #include "clk.h" -#include "clk-cpu.h" #include "clk-exynos-arm64.h" -#include "clk-pll.h" /* NOTE: Must be equal to the last clock ID increased by one */ #define CLKS_NR_TOP (CLK_SCLK_HDMI_SPDIF_DISP + 1) diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c index 4bbdf5e91650..37aa7beb547a 100644 --- a/drivers/clk/samsung/clk-pll.c +++ b/drivers/clk/samsung/clk-pll.c @@ -14,8 +14,8 @@ #include <linux/timekeeping.h> #include <linux/clk-provider.h> #include <linux/io.h> + #include "clk.h" -#include "clk-pll.h" #define PLL_TIMEOUT_US 20000U #define PLL_TIMEOUT_LOOPS 1000000U diff --git a/drivers/clk/samsung/clk-s3c64xx.c b/drivers/clk/samsung/clk-s3c64xx.c index d27a1f73f077..8ee3ffdf2b8d 100644 --- a/drivers/clk/samsung/clk-s3c64xx.c +++ b/drivers/clk/samsung/clk-s3c64xx.c @@ -14,7 +14,6 @@ #include <dt-bindings/clock/samsung,s3c64xx-clock.h> #include "clk.h" -#include "clk-pll.h" /* S3C64xx clock controller register offsets. */ #define APLL_LOCK 0x000 diff --git a/drivers/clk/samsung/clk-s5pv210.c b/drivers/clk/samsung/clk-s5pv210.c index cd85342e4ddb..29f2531fd5d3 100644 --- a/drivers/clk/samsung/clk-s5pv210.c +++ b/drivers/clk/samsung/clk-s5pv210.c @@ -13,7 +13,6 @@ #include <linux/of_address.h> #include "clk.h" -#include "clk-pll.h" #include <dt-bindings/clock/s5pv210.h> diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h index 516b716407e5..8157479f45eb 100644 --- a/drivers/clk/samsung/clk.h +++ b/drivers/clk/samsung/clk.h @@ -11,6 +11,7 @@ #define __SAMSUNG_CLK_H #include <linux/clk-provider.h> +#include "clk-cpu.h" #include "clk-pll.h" /** -- 2.39.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-02-16 22:32 UTC|newest] Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-02-16 22:32 [PATCH 00/16] clk: samsung: Add CPU clocks for Exynos850 Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-16 22:32 ` [PATCH 01/16] dt-bindings: clock: exynos850: Add CMU_CPUCLK0 and CMU_CPUCL1 Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-16 22:32 ` [PATCH 02/16] clk: samsung: Improve clk-cpu.c style Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-16 22:32 ` [PATCH 03/16] clk: samsung: Pull struct exynos_cpuclk into clk-cpu.c Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-16 22:32 ` [PATCH 04/16] clk: samsung: Reduce params count in exynos_register_cpu_clock() Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-16 22:32 ` [PATCH 05/16] clk: samsung: Use single CPU clock notifier callback for all chips Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-16 22:32 ` [PATCH 06/16] clk: samsung: Group CPU clock functions by chip Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-16 22:32 ` [PATCH 07/16] clk: samsung: Pass actual clock controller base address to CPU_CLK() Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-20 10:53 ` Krzysztof Kozlowski 2024-02-20 10:53 ` Krzysztof Kozlowski 2024-02-21 23:41 ` Sam Protsenko 2024-02-21 23:41 ` Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko [this message] 2024-02-16 22:32 ` [PATCH 08/16] clk: samsung: Use clk.h as a single header for Samsung CCF Sam Protsenko 2024-02-20 10:55 ` Krzysztof Kozlowski 2024-02-20 10:55 ` Krzysztof Kozlowski 2024-02-16 22:32 ` [PATCH 09/16] clk: samsung: Pass register layout type explicitly to CLK_CPU() Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-20 10:56 ` Krzysztof Kozlowski 2024-02-20 10:56 ` Krzysztof Kozlowski 2024-02-16 22:32 ` [PATCH 10/16] clk: samsung: Keep CPU clock chip specific data in a dedicated struct Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-16 22:32 ` [PATCH 11/16] clk: samsung: Keep register offsets in chip specific structure Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-20 11:04 ` Krzysztof Kozlowski 2024-02-20 11:04 ` Krzysztof Kozlowski 2024-02-22 0:42 ` Sam Protsenko 2024-02-22 0:42 ` Sam Protsenko 2024-02-22 7:47 ` Krzysztof Kozlowski 2024-02-22 7:47 ` Krzysztof Kozlowski 2024-02-24 19:57 ` Sam Protsenko 2024-02-24 19:57 ` Sam Protsenko 2024-02-16 22:32 ` [PATCH 12/16] clk: samsung: Pass mask to wait_until_mux_stable() Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-16 22:32 ` [PATCH 13/16] clk: samsung: Add CPU clock support for Exynos850 Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-16 22:32 ` [PATCH 14/16] clk: samsung: Implement manual PLL control for ARM64 SoCs Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-16 22:32 ` [PATCH 15/16] clk: samsung: exynos850: Add CMU_CPUCL0 and CMU_CPUCL1 Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-16 22:32 ` [PATCH 16/16] arm64: dts: exynos: Add CPU clocks Sam Protsenko 2024-02-16 22:32 ` Sam Protsenko 2024-02-20 11:07 ` [PATCH 00/16] clk: samsung: Add CPU clocks for Exynos850 Krzysztof Kozlowski 2024-02-20 11:07 ` Krzysztof Kozlowski 2024-02-21 23:07 ` Sam Protsenko 2024-02-21 23:07 ` Sam Protsenko 2024-02-22 7:45 ` Krzysztof Kozlowski 2024-02-22 7:45 ` Krzysztof Kozlowski
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