[PATCH 0/4] Setting live video input format for ZynqMP DPSUB

[Anatoliy Klymenko <anatoliy.klymenko@amd.com>]

Implement live video input format setting for ZynqMP DPSUB.

ZynqMP DPSUB can operate in 2 modes: DMA-based and live.

In the live mode, DPSUB receives a live video signal from FPGA-based CRTC.
DPSUB acts as a DRM encoder bridge in such a scenario. To properly tune
into the incoming video signal, DPSUB should be programmed with the proper
media bus format. This patch series addresses this task.

Patch 1/4: Set the DPSUB layer mode of operation prior to enabling the
layer. Allows to use layer operational mode before its enablement.

Patch 2/4: Announce supported input media bus formats via
drm_bridge_funcs.atomic_get_input_bus_fmts callback.

Patch 3/4: Program DPSUB live video input format based on selected bus
config in the new atomic bridge state.

Patch 4/4: New optional CRTC atomic helper proposal that will allow CRTC
to participate in DRM bridge chain format negotiation and impose format
restrictions. Incorporate this callback into the DRM bridge format
negotiation process.

Signed-off-by: Anatoliy Klymenko <anatoliy.klymenko@amd.com>
---
Anatoliy Klymenko (4):
      drm: xlnx: zynqmp_dpsub: Set layer mode during creation
      drm: xlnx: zynqmp_dpsub: Anounce supported input formats
      drm: xlnx: zynqmp_dpsub: Set input live format
      drm/atomic-helper: Add select_output_bus_format callback

 drivers/gpu/drm/drm_bridge.c             |  19 +++++-
 drivers/gpu/drm/xlnx/zynqmp_disp.c       | 109 +++++++++++++++++++++++++++++--
 drivers/gpu/drm/xlnx/zynqmp_disp.h       |  25 +++----
 drivers/gpu/drm/xlnx/zynqmp_disp_regs.h  |   8 +--
 drivers/gpu/drm/xlnx/zynqmp_dp.c         |  16 +++--
 drivers/gpu/drm/xlnx/zynqmp_kms.c        |   2 +-
 include/drm/drm_modeset_helper_vtables.h |  31 +++++++++
 7 files changed, 182 insertions(+), 28 deletions(-)
---
base-commit: bfa4437fd3938ae2e186e7664b2db65bb8775670
change-id: 20240226-dp-live-fmt-6415773b5a68

Best regards,
-- 
Anatoliy Klymenko <anatoliy.klymenko@amd.com>