From: Prabhakar <prabhakar.csengg@gmail.com> To: Geert Uytterhoeven <geert+renesas@glider.be>, Magnus Damm <magnus.damm@gmail.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar <prabhakar.csengg@gmail.com>, Fabrizio Castro <fabrizio.castro.jz@renesas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Subject: [PATCH v2 0/4] Add SoC identification for Renesas RZ/V2H SoC Date: Tue, 27 Feb 2024 23:25:27 +0000 [thread overview] Message-ID: <20240227232531.218159-1-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw) From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Hi all, This patch series aims to add SoC identification support for the Renesas RZ/V2H SoC. v1 - > v2 - Replaced RZ/V2H{P} -> RZ/V2H(P) - Included Ack from Krzysztof for patch #1 - Included RB from Geert for patch #1 and #4 - Dropped extal_clk node from patch #2 - Used small case for hex value in patch #3 v1: - https://patchwork.kernel.org/project/linux-renesas-soc/cover/20240219160912.1206647-1-prabhakar.mahadev-lad.rj@bp.renesas.com/ RZ/V2H boot logs: ------------------ ~ # uname -raLinux rz/v2h 6.8.0-rc6-arm64-renesas+ #229 SMP PREEMPT Tue Feb 27 21:11:51 GMT 2024 aarch64 GNU/Linux ~ # ~ # for i in machine family soc_id revision; do echo -n "$i: ";cat /sys/devices/ soc0/$i; done machine: Renesas EVK based on r9a09g057h44 family: RZ/V2H soc_id: r9a09g057 revision: 0 ~ # ~ # cat /proc/cpuinfo processor : 0 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 processor : 1 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 processor : 2 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 processor : 3 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 ~ # ~ # ------------------ Cheers, Prabhakar Lad Prabhakar (4): dt-bindings: soc: renesas: Document Renesas RZ/V2H(P) SoC variants dt-bindings: arm: renesas: Document Renesas RZ/V2H(P) System Controller soc: renesas: Add identification support for RZ/V2H SoC arm64: defconfig: Enable R9A09G057 SoC .../soc/renesas/renesas,r9a09g057-sys.yaml | 51 +++++++++++++++++++ .../bindings/soc/renesas/renesas.yaml | 8 +++ arch/arm64/configs/defconfig | 1 + drivers/soc/renesas/Kconfig | 5 ++ drivers/soc/renesas/renesas-soc.c | 20 +++++++- 5 files changed, 84 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Prabhakar <prabhakar.csengg@gmail.com> To: Geert Uytterhoeven <geert+renesas@glider.be>, Magnus Damm <magnus.damm@gmail.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar <prabhakar.csengg@gmail.com>, Fabrizio Castro <fabrizio.castro.jz@renesas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Subject: [PATCH v2 0/4] Add SoC identification for Renesas RZ/V2H SoC Date: Tue, 27 Feb 2024 23:25:27 +0000 [thread overview] Message-ID: <20240227232531.218159-1-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw) From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Hi all, This patch series aims to add SoC identification support for the Renesas RZ/V2H SoC. v1 - > v2 - Replaced RZ/V2H{P} -> RZ/V2H(P) - Included Ack from Krzysztof for patch #1 - Included RB from Geert for patch #1 and #4 - Dropped extal_clk node from patch #2 - Used small case for hex value in patch #3 v1: - https://patchwork.kernel.org/project/linux-renesas-soc/cover/20240219160912.1206647-1-prabhakar.mahadev-lad.rj@bp.renesas.com/ RZ/V2H boot logs: ------------------ ~ # uname -raLinux rz/v2h 6.8.0-rc6-arm64-renesas+ #229 SMP PREEMPT Tue Feb 27 21:11:51 GMT 2024 aarch64 GNU/Linux ~ # ~ # for i in machine family soc_id revision; do echo -n "$i: ";cat /sys/devices/ soc0/$i; done machine: Renesas EVK based on r9a09g057h44 family: RZ/V2H soc_id: r9a09g057 revision: 0 ~ # ~ # cat /proc/cpuinfo processor : 0 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 processor : 1 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 processor : 2 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 processor : 3 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 ~ # ~ # ------------------ Cheers, Prabhakar Lad Prabhakar (4): dt-bindings: soc: renesas: Document Renesas RZ/V2H(P) SoC variants dt-bindings: arm: renesas: Document Renesas RZ/V2H(P) System Controller soc: renesas: Add identification support for RZ/V2H SoC arm64: defconfig: Enable R9A09G057 SoC .../soc/renesas/renesas,r9a09g057-sys.yaml | 51 +++++++++++++++++++ .../bindings/soc/renesas/renesas.yaml | 8 +++ arch/arm64/configs/defconfig | 1 + drivers/soc/renesas/Kconfig | 5 ++ drivers/soc/renesas/renesas-soc.c | 20 +++++++- 5 files changed, 84 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2024-02-27 23:26 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-02-27 23:25 Prabhakar [this message] 2024-02-27 23:25 ` [PATCH v2 0/4] Add SoC identification for Renesas RZ/V2H SoC Prabhakar 2024-02-27 23:25 ` [PATCH v2 1/4] dt-bindings: soc: renesas: Document Renesas RZ/V2H(P) SoC variants Prabhakar 2024-02-27 23:25 ` Prabhakar 2024-02-28 11:33 ` Geert Uytterhoeven 2024-02-28 11:33 ` Geert Uytterhoeven 2024-02-27 23:25 ` [PATCH v2 2/4] dt-bindings: arm: renesas: Document Renesas RZ/V2H(P) System Controller Prabhakar 2024-02-27 23:25 ` Prabhakar 2024-02-28 7:49 ` Krzysztof Kozlowski 2024-02-28 7:49 ` Krzysztof Kozlowski 2024-02-28 9:43 ` Lad, Prabhakar 2024-02-28 9:43 ` Lad, Prabhakar 2024-02-28 11:16 ` Conor Dooley 2024-02-28 11:16 ` Conor Dooley 2024-02-28 11:31 ` Lad, Prabhakar 2024-02-28 11:31 ` Lad, Prabhakar 2024-02-28 14:09 ` Krzysztof Kozlowski 2024-02-28 14:09 ` Krzysztof Kozlowski 2024-02-28 11:34 ` Geert Uytterhoeven 2024-02-28 11:34 ` Geert Uytterhoeven 2024-02-28 11:48 ` Lad, Prabhakar 2024-02-28 11:48 ` Lad, Prabhakar 2024-02-27 23:25 ` [PATCH v2 3/4] soc: renesas: Add identification support for RZ/V2H SoC Prabhakar 2024-02-27 23:25 ` Prabhakar 2024-02-28 11:34 ` Geert Uytterhoeven 2024-02-28 11:34 ` Geert Uytterhoeven 2024-02-27 23:25 ` [PATCH v2 4/4] arm64: defconfig: Enable R9A09G057 SoC Prabhakar 2024-02-27 23:25 ` Prabhakar 2024-02-28 11:35 ` Geert Uytterhoeven 2024-02-28 11:35 ` Geert Uytterhoeven
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20240227232531.218159-1-prabhakar.mahadev-lad.rj@bp.renesas.com \ --to=prabhakar.csengg@gmail.com \ --cc=catalin.marinas@arm.com \ --cc=conor+dt@kernel.org \ --cc=devicetree@vger.kernel.org \ --cc=fabrizio.castro.jz@renesas.com \ --cc=geert+renesas@glider.be \ --cc=krzysztof.kozlowski+dt@linaro.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-renesas-soc@vger.kernel.org \ --cc=magnus.damm@gmail.com \ --cc=prabhakar.mahadev-lad.rj@bp.renesas.com \ --cc=robh+dt@kernel.org \ --cc=will@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.