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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk, atar4qemu@gmail.com
Subject: [PATCH 38/41] target/sparc: Implement SUBXC, SUBXCcc
Date: Fri,  1 Mar 2024 19:15:58 -1000	[thread overview]
Message-ID: <20240302051601.53649-39-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240302051601.53649-1-richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/sparc/translate.c  | 14 ++++++++++++++
 target/sparc/insns.decode |  2 ++
 2 files changed, 16 insertions(+)

diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 8eda190233..4775e39240 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -524,6 +524,17 @@ static void gen_op_subccc(TCGv dst, TCGv src1, TCGv src2)
     gen_op_subcc_int(dst, src1, src2, gen_carry32());
 }
 
+static void gen_op_subxc(TCGv dst, TCGv src1, TCGv src2)
+{
+    tcg_gen_sub_tl(dst, src1, src2);
+    tcg_gen_sub_tl(dst, dst, cpu_cc_C);
+}
+
+static void gen_op_subxccc(TCGv dst, TCGv src1, TCGv src2)
+{
+    gen_op_subcc_int(dst, src1, src2, cpu_cc_C);
+}
+
 static void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2)
 {
     TCGv zero = tcg_constant_tl(0);
@@ -3959,6 +3970,9 @@ TRANS(ARRAY32, VIS1, do_rrr, a, gen_op_array32)
 TRANS(ADDXC, VIS3, do_rrr, a, gen_op_addxc)
 TRANS(ADDXCcc, VIS3, do_rrr, a, gen_op_addxccc)
 
+TRANS(SUBXC, VIS4, do_rrr, a, gen_op_subxc)
+TRANS(SUBXCcc, VIS4, do_rrr, a, gen_op_subxccc)
+
 TRANS(UMULXHI, VIS3, do_rrr, a, gen_op_umulxhi)
 
 static void gen_op_alignaddr(TCGv dst, TCGv s1, TCGv s2)
diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode
index b7b4bfe92c..1f9e07e526 100644
--- a/target/sparc/insns.decode
+++ b/target/sparc/insns.decode
@@ -447,6 +447,8 @@ FCMPEq      10 000 cc:2 110101 .....  0 0101 0111 .....    \
     PDISTN      10 ..... 110110 ..... 0 0011 1111 .....    @r_d_d
 
     FMEAN16     10 ..... 110110 ..... 0 0100 0000 .....    @d_d_d
+    SUBXC       10 ..... 110110 ..... 0 0100 0001 .....    @r_r_r
+    SUBXCcc     10 ..... 110110 ..... 0 0100 0011 .....    @r_r_r
     FCHKSM16    10 ..... 110110 ..... 0 0100 0100 .....    @d_d_d
     FALIGNDATAg 10 ..... 110110 ..... 0 0100 1000 .....    @d_d_d
     FPMERGE     10 ..... 110110 ..... 0 0100 1011 .....    @d_r_r
-- 
2.34.1



  parent reply	other threads:[~2024-03-02  5:21 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-02  5:15 [PATCH 00/41] target/sparc: Implement VIS4 Richard Henderson
2024-03-02  5:15 ` [PATCH 01/41] linux-user/sparc: Add more hwcap bits for sparc64 Richard Henderson
2024-03-02  5:15 ` [PATCH 02/41] target/sparc: Fix FEXPAND Richard Henderson
2024-03-02  5:15 ` [PATCH 03/41] target/sparc: Fix FMUL8x16 Richard Henderson
2024-03-02  5:15 ` [PATCH 04/41] target/sparc: Fix FMUL8x16A{U,L} Richard Henderson
2024-04-30  8:07   ` Mark Cave-Ayland
2024-03-02  5:15 ` [PATCH 05/41] target/sparc: Fix FMULD8*X16 Richard Henderson
2024-03-02  5:15 ` [PATCH 06/41] target/sparc: Fix FPMERGE Richard Henderson
2024-03-02  5:15 ` [PATCH 07/41] target/sparc: Split out do_ms16b Richard Henderson
2024-03-02  5:15 ` [PATCH 08/41] target/sparc: Perform DFPREG/QFPREG in decodetree Richard Henderson
2024-05-10 15:18   ` Philippe Mathieu-Daudé
2024-03-02  5:15 ` [PATCH 09/41] target/sparc: Remove gen_dest_fpr_D Richard Henderson
2024-05-10 15:18   ` Philippe Mathieu-Daudé
2024-03-02  5:15 ` [PATCH 10/41] target/sparc: Remove cpu_fpr[] Richard Henderson
2024-03-02  5:15 ` [PATCH 11/41] target/sparc: Use gvec for VIS1 parallel add/sub Richard Henderson
2024-05-10 15:21   ` Philippe Mathieu-Daudé
2024-03-02  5:15 ` [PATCH 12/41] target/sparc: Implement FMAf extension Richard Henderson
2024-03-02  5:15 ` [PATCH 13/41] target/sparc: Add feature bits for VIS 3 Richard Henderson
2024-05-10 17:05   ` Philippe Mathieu-Daudé
2024-03-02  5:15 ` [PATCH 14/41] target/sparc: Implement ADDXC, ADDXCcc Richard Henderson
2024-05-10 16:16   ` Philippe Mathieu-Daudé
2024-03-02  5:15 ` [PATCH 15/41] target/sparc: Implement CMASK instructions Richard Henderson
2024-03-02  5:15 ` [PATCH 16/41] target/sparc: Implement FCHKSM16 Richard Henderson
2024-03-02  5:15 ` [PATCH 17/41] target/sparc: Implement FHADD, FHSUB, FNHADD, FNADD Richard Henderson
2024-03-02  5:15 ` [PATCH 18/41] target/sparc: Implement FNMUL Richard Henderson
2024-03-02  5:15 ` [PATCH 19/41] target/sparc: Implement FLCMP Richard Henderson
2024-03-02  5:15 ` [PATCH 20/41] target/sparc: Implement FMEAN16 Richard Henderson
2024-03-02  5:15 ` [PATCH 21/41] target/sparc: Implement FPADD64 FPSUB64 Richard Henderson
2024-05-10 16:19   ` Philippe Mathieu-Daudé
2024-03-02  5:15 ` [PATCH 22/41] target/sparc: Implement FPADDS, FPSUBS Richard Henderson
2024-03-02  5:15 ` [PATCH 23/41] target/sparc: Implement FPCMPEQ8, FPCMPNE8, FPCMPULE8, FPCMPUGT8 Richard Henderson
2024-03-02  5:15 ` [PATCH 24/41] target/sparc: Implement FSLL, FSRL, FSRA, FSLAS Richard Henderson
2024-03-02  5:15 ` [PATCH 25/41] target/sparc: Implement LDXEFSR Richard Henderson
2024-03-02  5:15 ` [PATCH 26/41] target/sparc: Implement LZCNT Richard Henderson
2024-05-10 17:22   ` Philippe Mathieu-Daudé
2024-03-02  5:15 ` [PATCH 27/41] target/sparc: Implement MOVsTOw, MOVdTOx, MOVwTOs, MOVxTOd Richard Henderson
2024-03-02  5:15 ` [PATCH 28/41] target/sparc: Implement PDISTN Richard Henderson
2024-05-10 17:28   ` Philippe Mathieu-Daudé
2024-03-02  5:15 ` [PATCH 29/41] target/sparc: Implement UMULXHI Richard Henderson
2024-03-02  5:15 ` [PATCH 30/41] target/sparc: Implement XMULX Richard Henderson
2024-03-02  5:15 ` [PATCH 31/41] target/sparc: Enable VIS3 feature bit Richard Henderson
2024-03-02  5:15 ` [PATCH 32/41] target/sparc: Implement IMA extension Richard Henderson
2024-05-10 17:09   ` Philippe Mathieu-Daudé
2024-03-02  5:15 ` [PATCH 33/41] target/sparc: Add feature bit for VIS4 Richard Henderson
2024-05-10 17:05   ` Philippe Mathieu-Daudé
2024-03-02  5:15 ` [PATCH 34/41] target/sparc: Implement FALIGNDATAi Richard Henderson
2024-03-02  5:15 ` [PATCH 35/41] target/sparc: Implement 8-bit FPADD, FPADDS, and FPADDUS Richard Henderson
2024-05-10 16:20   ` Philippe Mathieu-Daudé
2024-03-02  5:15 ` [PATCH 36/41] target/sparc: Implement VIS4 comparisons Richard Henderson
2024-03-02  5:15 ` [PATCH 37/41] target/sparc: Implement FPMIN, FPMAX Richard Henderson
2024-05-10 17:11   ` Philippe Mathieu-Daudé
2024-03-02  5:15 ` Richard Henderson [this message]
2024-05-10 16:21   ` [PATCH 38/41] target/sparc: Implement SUBXC, SUBXCcc Philippe Mathieu-Daudé
2024-03-02  5:15 ` [PATCH 39/41] target/sparc: Implement MWAIT Richard Henderson
2024-03-02  5:16 ` [PATCH 40/41] target/sparc: Implement monitor asis Richard Henderson
2024-05-10 17:04   ` Philippe Mathieu-Daudé
2024-03-02  5:16 ` [PATCH 41/41] target/sparc: Enable VIS4 feature bit Richard Henderson
2024-05-10 17:16   ` Philippe Mathieu-Daudé
2024-05-10 17:31     ` Philippe Mathieu-Daudé
2024-03-05 10:20 ` [PATCH 00/41] target/sparc: Implement VIS4 Mark Cave-Ayland
2024-04-29 20:52 ` Mark Cave-Ayland
2024-04-29 21:02   ` Richard Henderson
2024-04-29 21:10     ` Mark Cave-Ayland

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