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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 02/20] hw/arm: Connect BSC to BCM2835 board as I2C0, I2C1 and I2C2
Date: Tue,  5 Mar 2024 13:52:19 +0000	[thread overview]
Message-ID: <20240305135237.3111642-3-peter.maydell@linaro.org> (raw)
In-Reply-To: <20240305135237.3111642-1-peter.maydell@linaro.org>

From: Rayhan Faizel <rayhan.faizel@gmail.com>

BCM2835 has three I2C controllers. All of them share the same interrupt line.

Signed-off-by: Rayhan Faizel <rayhan.faizel@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240224191038.2409945-3-rayhan.faizel@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/hw/arm/bcm2835_peripherals.h |  4 ++-
 hw/arm/bcm2835_peripherals.c         | 45 ++++++++++++++++++++++++++--
 hw/arm/Kconfig                       |  1 +
 3 files changed, 46 insertions(+), 4 deletions(-)

diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
index 1fc96218f82..636203baa5a 100644
--- a/include/hw/arm/bcm2835_peripherals.h
+++ b/include/hw/arm/bcm2835_peripherals.h
@@ -32,6 +32,7 @@
 #include "hw/timer/bcm2835_systmr.h"
 #include "hw/usb/hcd-dwc2.h"
 #include "hw/ssi/bcm2835_spi.h"
+#include "hw/i2c/bcm2835_i2c.h"
 #include "hw/misc/unimp.h"
 #include "qom/object.h"
 
@@ -68,7 +69,8 @@ struct BCMSocPeripheralBaseState {
     BCM2835SDHostState sdhost;
     UnimplementedDeviceState i2s;
     BCM2835SPIState spi[1];
-    UnimplementedDeviceState i2c[3];
+    BCM2835I2CState i2c[3];
+    OrIRQState orgated_i2c_irq;
     UnimplementedDeviceState otp;
     UnimplementedDeviceState dbus;
     UnimplementedDeviceState ave0;
diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index a0bbe76f264..1695d8b453a 100644
--- a/hw/arm/bcm2835_peripherals.c
+++ b/hw/arm/bcm2835_peripherals.c
@@ -30,6 +30,9 @@
 #define SEPARATE_DMA_IRQ_MAX 10
 #define ORGATED_DMA_IRQ_COUNT 4
 
+/* All three I2C controllers share the same IRQ */
+#define ORGATED_I2C_IRQ_COUNT 3
+
 void create_unimp(BCMSocPeripheralBaseState *ps,
                   UnimplementedDeviceState *uds,
                   const char *name, hwaddr ofs, hwaddr size)
@@ -157,6 +160,19 @@ static void raspi_peripherals_base_init(Object *obj)
     /* SPI */
     object_initialize_child(obj, "bcm2835-spi0", &s->spi[0],
                             TYPE_BCM2835_SPI);
+
+    /* I2C */
+    object_initialize_child(obj, "bcm2835-i2c0", &s->i2c[0],
+                            TYPE_BCM2835_I2C);
+    object_initialize_child(obj, "bcm2835-i2c1", &s->i2c[1],
+                            TYPE_BCM2835_I2C);
+    object_initialize_child(obj, "bcm2835-i2c2", &s->i2c[2],
+                            TYPE_BCM2835_I2C);
+
+    object_initialize_child(obj, "orgated-i2c-irq",
+                            &s->orgated_i2c_irq, TYPE_OR_IRQ);
+    object_property_set_int(OBJECT(&s->orgated_i2c_irq), "num-lines",
+                            ORGATED_I2C_IRQ_COUNT, &error_abort);
 }
 
 static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
@@ -453,14 +469,37 @@ void bcm_soc_peripherals_common_realize(DeviceState *dev, Error **errp)
                                               BCM2835_IC_GPU_IRQ,
                                               INTERRUPT_SPI));
 
+    /* I2C */
+    for (n = 0; n < 3; n++) {
+        if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c[n]), errp)) {
+            return;
+        }
+    }
+
+    memory_region_add_subregion(&s->peri_mr, BSC0_OFFSET,
+            sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->i2c[0]), 0));
+    memory_region_add_subregion(&s->peri_mr, BSC1_OFFSET,
+            sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->i2c[1]), 0));
+    memory_region_add_subregion(&s->peri_mr, BSC2_OFFSET,
+            sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->i2c[2]), 0));
+
+    if (!qdev_realize(DEVICE(&s->orgated_i2c_irq), NULL, errp)) {
+        return;
+    }
+    for (n = 0; n < ORGATED_I2C_IRQ_COUNT; n++) {
+        sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[n]), 0,
+                           qdev_get_gpio_in(DEVICE(&s->orgated_i2c_irq), n));
+    }
+    qdev_connect_gpio_out(DEVICE(&s->orgated_i2c_irq), 0,
+                          qdev_get_gpio_in_named(DEVICE(&s->ic),
+                                                 BCM2835_IC_GPU_IRQ,
+                                                 INTERRUPT_I2C));
+
     create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000);
     create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
     create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
     create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
     create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
-    create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20);
-    create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20);
-    create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20);
     create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
     create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
     create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 7caebdd98e1..3c157376844 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -438,6 +438,7 @@ config RASPI
     select SDHCI
     select USB_DWC2
     select BCM2835_SPI
+    select BCM2835_I2C
 
 config STM32F100_SOC
     bool
-- 
2.34.1



  parent reply	other threads:[~2024-03-05 13:54 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-05 13:52 [PULL 00/20] target-arm queue Peter Maydell
2024-03-05 13:52 ` [PULL 01/20] hw/i2c: Implement Broadcom Serial Controller (BSC) Peter Maydell
2024-03-05 13:52 ` Peter Maydell [this message]
2024-03-05 13:52 ` [PULL 03/20] tests/qtest: Add testcase for BCM2835 BSC Peter Maydell
2024-03-05 13:52 ` [PULL 04/20] hw/char/pl011: Add support for loopback Peter Maydell
2024-03-05 13:52 ` [PULL 05/20] hw/misc/stm32l4x5_rcc: Implement STM32L4x5_RCC skeleton Peter Maydell
2024-03-05 13:52 ` [PULL 06/20] hw/misc/stm32l4x5_rcc: Add an internal clock multiplexer object Peter Maydell
2024-03-05 13:52 ` [PULL 07/20] hw/misc/stm32l4x5_rcc: Add an internal PLL Clock object Peter Maydell
2024-03-05 13:52 ` [PULL 08/20] hw/misc/stm32l4x5_rcc: Initialize PLLs and clock multiplexers Peter Maydell
2024-03-05 13:52 ` [PULL 09/20] hw/misc/stm32l4x5_rcc: Handle Register Updates Peter Maydell
2024-03-05 13:52 ` [PULL 10/20] hw/misc/stm32l4x5_rcc: Add write protections to CR register Peter Maydell
2024-03-05 13:52 ` [PULL 11/20] hw/arm/stm32l4x5_soc.c: Use the RCC Sysclk Peter Maydell
2024-03-05 13:52 ` [PULL 12/20] tests/qtest/stm32l4x5_rcc-test.c: Add tests for the STM32L4x5_RCC Peter Maydell
2024-03-05 13:52 ` [PULL 13/20] target/arm: Support 32-byte alignment in pow2_align Peter Maydell
2024-03-05 13:52 ` [PULL 14/20] exec/memattrs: Remove target_tlb_bit* Peter Maydell
2024-03-05 13:52 ` [PULL 15/20] accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull Peter Maydell
2024-03-05 13:52 ` [PULL 16/20] accel/tcg: Add TLB_CHECK_ALIGNED Peter Maydell
2024-03-05 13:52 ` [PULL 17/20] target/arm: Do memory type alignment check when translation disabled Peter Maydell
2024-03-05 13:52 ` [PULL 18/20] target/arm: Do memory type alignment check when translation enabled Peter Maydell
2024-03-05 13:52 ` [PULL 19/20] atomic.h: Reword confusing comment for qatomic_cmpxchg Peter Maydell
2024-03-05 13:52 ` [PULL 20/20] qemu-options.hx: Don't claim "-serial" has limit of 4 serial ports Peter Maydell
2024-03-05 15:26 ` [PULL 00/20] target-arm queue Peter Maydell

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