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From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"Jani Nikula" <jani.nikula@linux.intel.com>,
	"Jouni Högander" <jouni.hogander@intel.com>
Subject: [PATCH v4 2/5] drm/i915/psr: Improve fast and IO wake lines calculation
Date: Wed,  6 Mar 2024 10:34:24 +0200	[thread overview]
Message-ID: <20240306083427.2040475-3-jouni.hogander@intel.com> (raw)
In-Reply-To: <20240306083427.2040475-1-jouni.hogander@intel.com>

Current fast and IO wake lines calculation is assuming fast wake sync
length is 18 pulses. Let's improve this by checking actual length.

Add getter for IO buffer wake time and return 10 us there which was assumed
with static 42 us IO wake time. Upcoming patches will extent this for
different display versions.

Bspec: 65450

v2:
  - rename io_wake_time in if block to io_buffer_wake_time
  - rename get_io_wake_time to get_io_buffer_wake_time

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 21 +++++++++++++++------
 1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 6927785fd6ff..905208e1c771 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1150,6 +1150,11 @@ static bool _lnl_compute_alpm_params(struct intel_dp *intel_dp,
 	return true;
 }
 
+static int get_io_buffer_wake_time(void)
+{
+	return 10;
+}
+
 static bool _compute_alpm_params(struct intel_dp *intel_dp,
 				 struct intel_crtc_state *crtc_state)
 {
@@ -1158,12 +1163,16 @@ static bool _compute_alpm_params(struct intel_dp *intel_dp,
 	u8 max_wake_lines;
 
 	if (DISPLAY_VER(i915) >= 12) {
-		io_wake_time = 42;
-		/*
-		 * According to Bspec it's 42us, but based on testing
-		 * it is not enough -> use 45 us.
-		 */
-		fast_wake_time = 45;
+		int io_buffer_wake_time = get_io_buffer_wake_time();
+		int tfw_exit_latency = 20; /* eDP spec */
+		int phy_wake = 4;	   /* eDP spec */
+		int preamble = 8;	   /* eDP spec */
+		int precharge = intel_dp_aux_fw_sync_len() - preamble;
+
+		io_wake_time = max(precharge, io_buffer_wake_time) + preamble +
+			phy_wake + tfw_exit_latency;
+		fast_wake_time = precharge + preamble + phy_wake +
+			tfw_exit_latency;
 
 		/* TODO: Check how we can use ALPM_CTL fast wake extended field */
 		max_wake_lines = 12;
-- 
2.34.1


  parent reply	other threads:[~2024-03-06  8:35 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-06  8:34 [PATCH v4 0/5] IO and fast wake lines calculation and increase fw sync length Jouni Högander
2024-03-06  8:34 ` [PATCH v4 1/5] drm/i915/display: Make intel_dp_aux_fw_sync_len available for PSR code Jouni Högander
2024-03-06  8:34 ` Jouni Högander [this message]
2024-03-06  8:34 ` [PATCH v4 3/5] drm/i915/psr: Calculate IO wake and fast wake lines for DISPLAY_VER < 12 Jouni Högander
2024-03-07 17:16   ` Ville Syrjälä
2024-03-08  8:28     ` Hogander, Jouni
2024-03-06  8:34 ` [PATCH v4 4/5] drm/i915/psr: Add IO buffer wake times for LunarLake and beyond Jouni Högander
2024-03-07 17:15   ` Ville Syrjälä
2024-03-08  8:39     ` Hogander, Jouni
2024-03-08 10:11       ` Ville Syrjälä
2024-03-08 11:01         ` Hogander, Jouni
2024-03-06  8:34 ` [PATCH v4 5/5] drm/i915/display: Increase number of fast wake precharge pulses Jouni Högander
2024-03-06 18:18 ` ✗ Fi.CI.SPARSE: warning for IO and fast wake lines calculation and increase fw sync length (rev4) Patchwork
2024-03-06 18:32 ` ✓ Fi.CI.BAT: success " Patchwork
2024-03-07 14:47 ` ✗ Fi.CI.IGT: failure " Patchwork

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