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From: Sean Christopherson <seanjc@google.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, Sean Christopherson <seanjc@google.com>,
	 Like Xu <like.xu.linux@gmail.com>,
	Mingwei Zhang <mizhang@google.com>,
	 Zhenyu Wang <zhenyuw@linux.intel.com>,
	Zhang Xiong <xiong.y.zhang@intel.com>,
	 Lv Zhiyuan <zhiyuan.lv@intel.com>,
	Dapeng Mi <dapeng1.mi@intel.com>
Subject: [kvm-unit-tests PATCH 4/4] x86/pmu: Add a PEBS test to verify the host LBRs aren't leaked to the guest
Date: Wed,  6 Mar 2024 15:01:53 -0800	[thread overview]
Message-ID: <20240306230153.786365-5-seanjc@google.com> (raw)
In-Reply-To: <20240306230153.786365-1-seanjc@google.com>

When using adaptive PEBS with LBR entries, verify that the LBR entries are
all '0'.  If KVM fails to context switch LBRs, e.g. when the guest isn't
using LBRs, as is the case in the pmu_pebs test, then adaptive PEBS can be
used to read the *host* LBRs as the CPU doesn't enforce the VMX MSR bitmaps
when generating PEBS records, i.e. ignores KVM's interception of reads to
LBR MSRs.

This testcase is best exercised by simultaneously utilizing LBRs in the
host, e.g. by running "perf record -b -e instructions", so that there is
non-zero data in the LBR MSRs.

Cc: Like Xu <like.xu.linux@gmail.com>
Cc: Mingwei Zhang <mizhang@google.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Zhang Xiong <xiong.y.zhang@intel.com>
Cc: Lv Zhiyuan <zhiyuan.lv@intel.com>
Cc: Dapeng Mi <dapeng1.mi@intel.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
 x86/pmu_pebs.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/x86/pmu_pebs.c b/x86/pmu_pebs.c
index 0e8d60c3..df8e736f 100644
--- a/x86/pmu_pebs.c
+++ b/x86/pmu_pebs.c
@@ -299,6 +299,19 @@ static void check_pebs_records(u64 bitmask, u64 pebs_data_cfg, bool use_adaptive
 		expected = pebs_idx_match && pebs_size_match && data_cfg_match;
 		report(expected,
 		       "PEBS record (written seq %d) is verified (including size, counters and cfg).", count);
+		if (use_adaptive && (pebs_data_cfg & PEBS_DATACFG_LBRS)) {
+			unsigned int lbrs_offset = get_pebs_record_size(pebs_data_cfg & ~PEBS_DATACFG_LBRS, true);
+			struct lbr_entry *pebs_lbrs = cur_record + lbrs_offset;
+			int i;
+
+			for (i = 0; i < MAX_NUM_LBR_ENTRY; i++) {
+				if (!pebs_lbrs[i].from && !pebs_lbrs[i].to)
+					continue;
+
+				report_fail("PEBS LBR record %u isn't empty, got from = '%lx', to = '%lx', info = '%lx'",
+					    i, pebs_lbrs[i].from, pebs_lbrs[i].to, pebs_lbrs[i].info);
+			}
+		}
 		cur_record = cur_record + pebs_record_size;
 		count++;
 	} while (expected && (void *)cur_record < (void *)ds->pebs_index);
-- 
2.44.0.278.ge034bb2e1d-goog


  parent reply	other threads:[~2024-03-06 23:02 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-06 23:01 [kvm-unit-tests PATCH 0/4] x86/pmu: PEBS fixes and new testcases Sean Christopherson
2024-03-06 23:01 ` [kvm-unit-tests PATCH 1/4] x86/pmu: Enable PEBS on fixed counters iff baseline PEBS is support Sean Christopherson
2024-03-07  9:22   ` Mi, Dapeng
2024-03-06 23:01 ` [kvm-unit-tests PATCH 2/4] x86/pmu: Iterate over adaptive PEBS flag combinations Sean Christopherson
2024-03-06 23:01 ` [kvm-unit-tests PATCH 3/4] x86/pmu: Test adaptive PEBS without any adaptive counters Sean Christopherson
2024-03-07  9:08   ` Like Xu
2024-03-07  9:28   ` Mi, Dapeng
2024-03-07 10:00   ` Mi, Dapeng
2024-03-06 23:01 ` Sean Christopherson [this message]
2024-03-07  9:23   ` [kvm-unit-tests PATCH 4/4] x86/pmu: Add a PEBS test to verify the host LBRs aren't leaked to the guest Like Xu
2024-03-07  9:31   ` Mi, Dapeng
2024-03-07  9:22 ` [kvm-unit-tests PATCH 0/4] x86/pmu: PEBS fixes and new testcases Mi, Dapeng

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