From: Linu Cherian <lcherian@marvell.com> To: <suzuki.poulose@arm.com>, <mike.leach@linaro.org>, <james.clark@arm.com>, <leo.yan@linaro.org> Cc: <linux-arm-kernel@lists.infradead.org>, <coresight@lists.linaro.org>, <linux-kernel@vger.kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <devicetree@vger.kernel.org>, <sgoutham@marvell.com>, <gcherian@marvell.com>, Linu Cherian <lcherian@marvell.com>, Rob Herring <robh@kernel.org> Subject: [PATCH v7 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property Date: Thu, 7 Mar 2024 09:06:19 +0530 [thread overview] Message-ID: <20240307033625.325058-2-lcherian@marvell.com> (raw) In-Reply-To: <20240307033625.325058-1-lcherian@marvell.com> memory-region 0: Reserved trace buffer memory TMC ETR: When available, use this reserved memory region for trace data capture. Same region is used for trace data retention after a panic or watchdog reset. TMC ETF: When available, use this reserved memory region for trace data retention synced from internal SRAM after a panic or watchdog reset. memory-region 1: Reserved meta data memory TMC ETR, ETF: When available, use this memory for register snapshot retention synced from hardware registers after a panic or watchdog reset. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linu Cherian <lcherian@marvell.com> --- Changelog from v6: * Added new line after memory-region description - suggested by Rob Herring .../bindings/arm/arm,coresight-tmc.yaml | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml index cb8dceaca70e..4787d7c6bac2 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml @@ -101,6 +101,29 @@ properties: and ETF configurations. $ref: /schemas/graph.yaml#/properties/port + memory-region: + items: + - description: Reserved trace buffer memory for ETR and ETF sinks. + For ETR, this reserved memory region is used for trace data capture. + Same region is used for trace data retention as well after a panic + or watchdog reset. + This reserved memory region is used as trace buffer or used for trace + data retention only if specifically selected by the user in sysfs + interface. + The default memory usage models for ETR in sysfs/perf modes are + otherwise unaltered. + + For ETF, this reserved memory region is used by default for + retention of trace data synced from internal SRAM after a panic + or watchdog reset. + - description: Reserved meta data memory. Used for ETR and ETF sinks + for storing metadata. + + memory-region-names: + items: + - const: tracedata + - const: metadata + required: - compatible - reg @@ -115,6 +138,9 @@ examples: etr@20070000 { compatible = "arm,coresight-tmc", "arm,primecell"; reg = <0x20070000 0x1000>; + memory-region = <&etr_trace_mem_reserved>, + <&etr_mdata_mem_reserved>; + memory-region-names = "tracedata", "metadata"; clocks = <&oscclk6a>; clock-names = "apb_pclk"; -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Linu Cherian <lcherian@marvell.com> To: <suzuki.poulose@arm.com>, <mike.leach@linaro.org>, <james.clark@arm.com>, <leo.yan@linaro.org> Cc: <linux-arm-kernel@lists.infradead.org>, <coresight@lists.linaro.org>, <linux-kernel@vger.kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <devicetree@vger.kernel.org>, <sgoutham@marvell.com>, <gcherian@marvell.com>, Linu Cherian <lcherian@marvell.com>, Rob Herring <robh@kernel.org> Subject: [PATCH v7 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property Date: Thu, 7 Mar 2024 09:06:19 +0530 [thread overview] Message-ID: <20240307033625.325058-2-lcherian@marvell.com> (raw) In-Reply-To: <20240307033625.325058-1-lcherian@marvell.com> memory-region 0: Reserved trace buffer memory TMC ETR: When available, use this reserved memory region for trace data capture. Same region is used for trace data retention after a panic or watchdog reset. TMC ETF: When available, use this reserved memory region for trace data retention synced from internal SRAM after a panic or watchdog reset. memory-region 1: Reserved meta data memory TMC ETR, ETF: When available, use this memory for register snapshot retention synced from hardware registers after a panic or watchdog reset. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linu Cherian <lcherian@marvell.com> --- Changelog from v6: * Added new line after memory-region description - suggested by Rob Herring .../bindings/arm/arm,coresight-tmc.yaml | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml index cb8dceaca70e..4787d7c6bac2 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml @@ -101,6 +101,29 @@ properties: and ETF configurations. $ref: /schemas/graph.yaml#/properties/port + memory-region: + items: + - description: Reserved trace buffer memory for ETR and ETF sinks. + For ETR, this reserved memory region is used for trace data capture. + Same region is used for trace data retention as well after a panic + or watchdog reset. + This reserved memory region is used as trace buffer or used for trace + data retention only if specifically selected by the user in sysfs + interface. + The default memory usage models for ETR in sysfs/perf modes are + otherwise unaltered. + + For ETF, this reserved memory region is used by default for + retention of trace data synced from internal SRAM after a panic + or watchdog reset. + - description: Reserved meta data memory. Used for ETR and ETF sinks + for storing metadata. + + memory-region-names: + items: + - const: tracedata + - const: metadata + required: - compatible - reg @@ -115,6 +138,9 @@ examples: etr@20070000 { compatible = "arm,coresight-tmc", "arm,primecell"; reg = <0x20070000 0x1000>; + memory-region = <&etr_trace_mem_reserved>, + <&etr_mdata_mem_reserved>; + memory-region-names = "tracedata", "metadata"; clocks = <&oscclk6a>; clock-names = "apb_pclk"; -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-03-07 3:37 UTC|newest] Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-03-07 3:36 [PATCH v7 0/7] Coresight for Kernel panic and watchdog reset Linu Cherian 2024-03-07 3:36 ` Linu Cherian 2024-03-07 3:36 ` Linu Cherian [this message] 2024-03-07 3:36 ` [PATCH v7 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property Linu Cherian 2024-03-07 3:36 ` [PATCH v7 2/7] coresight: tmc-etr: Add support to use reserved trace memory Linu Cherian 2024-03-07 3:36 ` Linu Cherian 2024-04-12 9:57 ` James Clark 2024-04-12 9:57 ` James Clark 2024-04-14 10:09 ` [EXTERNAL] " Linu Cherian 2024-04-14 10:09 ` Linu Cherian 2024-03-07 3:36 ` [PATCH v7 3/7] coresight: core: Add provision for panic callbacks Linu Cherian 2024-03-07 3:36 ` Linu Cherian 2024-03-07 3:36 ` [PATCH v7 4/7] coresight: tmc: Enable panic sync handling Linu Cherian 2024-03-07 3:36 ` Linu Cherian 2024-03-07 3:36 ` [PATCH v7 5/7] coresight: tmc: Add support for reading crash data Linu Cherian 2024-03-07 3:36 ` Linu Cherian 2024-04-12 10:05 ` James Clark 2024-04-12 10:05 ` James Clark 2024-04-15 4:01 ` [EXTERNAL] " Linu Cherian 2024-04-15 4:01 ` Linu Cherian 2024-04-15 9:28 ` James Clark 2024-04-15 9:28 ` James Clark 2024-04-21 2:49 ` Linu Cherian 2024-04-21 2:49 ` Linu Cherian 2024-04-22 8:18 ` James Clark 2024-04-22 8:18 ` James Clark 2024-04-25 2:07 ` [EXTERNAL] " Linu Cherian 2024-04-25 2:07 ` Linu Cherian 2024-04-25 9:32 ` James Clark 2024-04-25 9:32 ` James Clark 2024-03-07 3:36 ` [PATCH v7 6/7] coresight: tmc: Stop trace capture on FlIn Linu Cherian 2024-03-07 3:36 ` Linu Cherian 2024-03-07 3:36 ` [PATCH v7 7/7] coresight: config: Add preloaded configuration Linu Cherian 2024-03-07 3:36 ` Linu Cherian 2024-04-09 0:10 ` [PATCH v7 0/7] Coresight for Kernel panic and watchdog reset Linu Cherian 2024-04-09 0:10 ` Linu Cherian 2024-04-09 9:28 ` James Clark 2024-04-09 9:28 ` James Clark
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