From: Georgi Djakov <quic_c_gdjako@quicinc.com> To: <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <will@kernel.org>, <robin.murphy@arm.com>, <joro@8bytes.org>, <iommu@lists.linux.dev> Cc: <devicetree@vger.kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <robdclark@gmail.com>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>, <quic_cgoldswo@quicinc.com>, <quic_sukadev@quicinc.com>, <quic_pdaly@quicinc.com>, <quic_sudaraja@quicinc.com>, <djakov@kernel.org> Subject: [PATCH v6 1/7] dt-bindings: iommu: Add Qualcomm TBU Date: Thu, 7 Mar 2024 11:05:19 -0800 [thread overview] Message-ID: <20240307190525.395291-2-quic_c_gdjako@quicinc.com> (raw) In-Reply-To: <20240307190525.395291-1-quic_c_gdjako@quicinc.com> The "apps_smmu" on the Qualcomm sdm845 platform is an implementation of the SMMU-500, that consists of a single TCU (Translation Control Unit) and multiple TBUs (Translation Buffer Units). These TBUs have hardware debugging features that are specific and only present on Qualcomm hardware. Represent them as independent DT nodes. List all the resources that are needed to operate them (such as registers, clocks, power domains and interconnects). Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com> --- .../devicetree/bindings/iommu/qcom,tbu.yaml | 69 +++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 Documentation/devicetree/bindings/iommu/qcom,tbu.yaml diff --git a/Documentation/devicetree/bindings/iommu/qcom,tbu.yaml b/Documentation/devicetree/bindings/iommu/qcom,tbu.yaml new file mode 100644 index 000000000000..82dfe935573e --- /dev/null +++ b/Documentation/devicetree/bindings/iommu/qcom,tbu.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iommu/qcom,tbu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm TBU (Translation Buffer Unit) + +maintainers: + - Georgi Djakov <quic_c_gdjako@quicinc.com> + +description: + The Qualcomm SMMU500 implementation consists of TCU and TBU. The TBU contains + a Translation Lookaside Buffer (TLB) that caches page tables. TBUs provides + debug features to trace and trigger debug transactions. There are multiple TBU + instances with each client core. + +properties: + compatible: + enum: + - qcom,sc7280-tbu + - qcom,sdm845-tbu + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interconnects: + maxItems: 1 + + power-domains: + maxItems: 1 + + qcom,stream-id-range: + description: | + Phandle of a SMMU device and Stream ID range (address and size) that + is assigned by the TBU + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle of a smmu node + - description: stream id base address + - description: stream id size + +required: + - compatible + - reg + - qcom,stream-id-range + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sdm845.h> + #include <dt-bindings/interconnect/qcom,icc.h> + #include <dt-bindings/interconnect/qcom,sdm845.h> + + tbu@150e1000 { + compatible = "qcom,sdm845-tbu"; + reg = <0x150e1000 0x1000>; + clocks = <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + interconnects = <&system_noc MASTER_GNOC_SNOC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_IMEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; + power-domains = <&gcc HLOS1_VOTE_AGGRE_NOC_MMU_PCIE_TBU_GDSC>; + qcom,stream-id-range = <&apps_smmu 0x1c00 0x400>; + }; +...
WARNING: multiple messages have this Message-ID (diff)
From: Georgi Djakov <quic_c_gdjako@quicinc.com> To: <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <will@kernel.org>, <robin.murphy@arm.com>, <joro@8bytes.org>, <iommu@lists.linux.dev> Cc: <devicetree@vger.kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <robdclark@gmail.com>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>, <quic_cgoldswo@quicinc.com>, <quic_sukadev@quicinc.com>, <quic_pdaly@quicinc.com>, <quic_sudaraja@quicinc.com>, <djakov@kernel.org> Subject: [PATCH v6 1/7] dt-bindings: iommu: Add Qualcomm TBU Date: Thu, 7 Mar 2024 11:05:19 -0800 [thread overview] Message-ID: <20240307190525.395291-2-quic_c_gdjako@quicinc.com> (raw) In-Reply-To: <20240307190525.395291-1-quic_c_gdjako@quicinc.com> The "apps_smmu" on the Qualcomm sdm845 platform is an implementation of the SMMU-500, that consists of a single TCU (Translation Control Unit) and multiple TBUs (Translation Buffer Units). These TBUs have hardware debugging features that are specific and only present on Qualcomm hardware. Represent them as independent DT nodes. List all the resources that are needed to operate them (such as registers, clocks, power domains and interconnects). Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com> --- .../devicetree/bindings/iommu/qcom,tbu.yaml | 69 +++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 Documentation/devicetree/bindings/iommu/qcom,tbu.yaml diff --git a/Documentation/devicetree/bindings/iommu/qcom,tbu.yaml b/Documentation/devicetree/bindings/iommu/qcom,tbu.yaml new file mode 100644 index 000000000000..82dfe935573e --- /dev/null +++ b/Documentation/devicetree/bindings/iommu/qcom,tbu.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iommu/qcom,tbu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm TBU (Translation Buffer Unit) + +maintainers: + - Georgi Djakov <quic_c_gdjako@quicinc.com> + +description: + The Qualcomm SMMU500 implementation consists of TCU and TBU. The TBU contains + a Translation Lookaside Buffer (TLB) that caches page tables. TBUs provides + debug features to trace and trigger debug transactions. There are multiple TBU + instances with each client core. + +properties: + compatible: + enum: + - qcom,sc7280-tbu + - qcom,sdm845-tbu + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + interconnects: + maxItems: 1 + + power-domains: + maxItems: 1 + + qcom,stream-id-range: + description: | + Phandle of a SMMU device and Stream ID range (address and size) that + is assigned by the TBU + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle of a smmu node + - description: stream id base address + - description: stream id size + +required: + - compatible + - reg + - qcom,stream-id-range + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sdm845.h> + #include <dt-bindings/interconnect/qcom,icc.h> + #include <dt-bindings/interconnect/qcom,sdm845.h> + + tbu@150e1000 { + compatible = "qcom,sdm845-tbu"; + reg = <0x150e1000 0x1000>; + clocks = <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + interconnects = <&system_noc MASTER_GNOC_SNOC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_IMEM_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; + power-domains = <&gcc HLOS1_VOTE_AGGRE_NOC_MMU_PCIE_TBU_GDSC>; + qcom,stream-id-range = <&apps_smmu 0x1c00 0x400>; + }; +... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-03-07 19:06 UTC|newest] Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-03-07 19:05 [PATCH v6 0/7] Add support for Translation Buffer Units Georgi Djakov 2024-03-07 19:05 ` Georgi Djakov 2024-03-07 19:05 ` Georgi Djakov [this message] 2024-03-07 19:05 ` [PATCH v6 1/7] dt-bindings: iommu: Add Qualcomm TBU Georgi Djakov 2024-03-07 22:24 ` Rob Herring 2024-03-07 22:24 ` Rob Herring 2024-03-07 19:05 ` [PATCH v6 2/7] iommu/arm-smmu-qcom-tbu: Add Qualcomm TBU driver Georgi Djakov 2024-03-07 19:05 ` Georgi Djakov 2024-03-07 19:05 ` [PATCH v6 3/7] iommu/arm-smmu: Allow using a threaded handler for context interrupts Georgi Djakov 2024-03-07 19:05 ` Georgi Djakov 2024-03-07 19:05 ` [PATCH v6 4/7] iommu/arm-smmu-qcom: Use a custom context fault handler for sdm845 Georgi Djakov 2024-03-07 19:05 ` Georgi Djakov 2024-03-12 18:14 ` Konrad Dybcio 2024-03-12 18:14 ` Konrad Dybcio 2024-03-07 19:05 ` [PATCH v6 5/7] arm64: dts: qcom: sdm845: Add DT nodes for the TBUs Georgi Djakov 2024-03-07 19:05 ` Georgi Djakov 2024-03-07 19:05 ` [PATCH v6 6/7] iommu/arm-smmu-qcom: Use the custom fault handler on more platforms Georgi Djakov 2024-03-07 19:05 ` Georgi Djakov 2024-03-07 19:05 ` [PATCH v6 7/7] arm64: dts: qcom: sc7280: Add DT nodes for the TBUs Georgi Djakov 2024-03-07 19:05 ` Georgi Djakov
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