From: lakshmi.sowjanya.d@intel.com To: tglx@linutronix.de, jstultz@google.com, giometti@enneenne.com, corbet@lwn.net, linux-kernel@vger.kernel.org Cc: x86@kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, intel-wired-lan@lists.osuosl.org, andriy.shevchenko@linux.intel.com, eddie.dong@intel.com, christopher.s.hall@intel.com, jesse.brandeburg@intel.com, davem@davemloft.net, alexandre.torgue@foss.st.com, joabreu@synopsys.com, mcoquelin.stm32@gmail.com, perex@perex.cz, linux-sound@vger.kernel.org, anthony.l.nguyen@intel.com, peter.hilber@opensynergy.com, pandith.n@intel.com, mallikarjunappa.sangannavar@intel.com, subramanian.mohan@intel.com, basavaraj.goudar@intel.com, thejesh.reddy.t.r@intel.com, lakshmi.sowjanya.d@intel.com Subject: [PATCH v5 10/11] Documentation: driver-api: pps: Add Intel Timed I/O PPS generator Date: Tue, 19 Mar 2024 18:35:46 +0530 [thread overview] Message-ID: <20240319130547.4195-11-lakshmi.sowjanya.d@intel.com> (raw) In-Reply-To: <20240319130547.4195-1-lakshmi.sowjanya.d@intel.com> From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> Add Intel Timed I/O PPS usage instructions. Co-developed-by: Pandith N <pandith.n@intel.com> Signed-off-by: Pandith N <pandith.n@intel.com> Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> --- Documentation/driver-api/pps.rst | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/Documentation/driver-api/pps.rst b/Documentation/driver-api/pps.rst index 78dded03e5d8..52a6d5faf885 100644 --- a/Documentation/driver-api/pps.rst +++ b/Documentation/driver-api/pps.rst @@ -246,3 +246,25 @@ delay between assert and clear edge as small as possible to reduce system latencies. But if it is too small slave won't be able to capture clear edge transition. The default of 30us should be good enough in most situations. The delay can be selected using 'delay' pps_gen_parport module parameter. + + +Intel Timed I/O PPS signal generator +------------------------------------ + +Intel Timed I/O is a high precision device, present on 2019 and newer Intel +CPUs, that can generate PPS signals. + +Timed I/O and system time are both driven by same hardware clock. The signal +is generated with a precision of ~20 nanoseconds. The generated PPS signal +is used to synchronize an external device with system clock. For example, +share your clock with a device that receives PPS signal, generated by +Timed I/O device. There are dedicated Timed I/O pins to deliver the PPS signal +to an external device. + +Usage of Intel Timed I/O as PPS generator: + +Start generating PPS signal:: + $echo 1 > /sys/devices/platform/INTCxxxx\:00/enable + +Stop generating PPS signal:: + $echo 0 > /sys/devices/platform/INTCxxxx\:00/enable -- 2.35.3
WARNING: multiple messages have this Message-ID (diff)
From: lakshmi.sowjanya.d@intel.com To: tglx@linutronix.de, jstultz@google.com, giometti@enneenne.com, corbet@lwn.net, linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org, mallikarjunappa.sangannavar@intel.com, alexandre.torgue@foss.st.com, perex@perex.cz, basavaraj.goudar@intel.com, thejesh.reddy.t.r@intel.com, christopher.s.hall@intel.com, x86@kernel.org, joabreu@synopsys.com, peter.hilber@opensynergy.com, intel-wired-lan@lists.osuosl.org, subramanian.mohan@intel.com, linux-sound@vger.kernel.org, lakshmi.sowjanya.d@intel.com, andriy.shevchenko@linux.intel.com, netdev@vger.kernel.org, pandith.n@intel.com, eddie.dong@intel.com, mcoquelin.stm32@gmail.com, anthony.l.nguyen@intel.com, davem@davemloft.net Subject: [Intel-wired-lan] [PATCH v5 10/11] Documentation: driver-api: pps: Add Intel Timed I/O PPS generator Date: Tue, 19 Mar 2024 18:35:46 +0530 [thread overview] Message-ID: <20240319130547.4195-11-lakshmi.sowjanya.d@intel.com> (raw) In-Reply-To: <20240319130547.4195-1-lakshmi.sowjanya.d@intel.com> From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> Add Intel Timed I/O PPS usage instructions. Co-developed-by: Pandith N <pandith.n@intel.com> Signed-off-by: Pandith N <pandith.n@intel.com> Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> --- Documentation/driver-api/pps.rst | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/Documentation/driver-api/pps.rst b/Documentation/driver-api/pps.rst index 78dded03e5d8..52a6d5faf885 100644 --- a/Documentation/driver-api/pps.rst +++ b/Documentation/driver-api/pps.rst @@ -246,3 +246,25 @@ delay between assert and clear edge as small as possible to reduce system latencies. But if it is too small slave won't be able to capture clear edge transition. The default of 30us should be good enough in most situations. The delay can be selected using 'delay' pps_gen_parport module parameter. + + +Intel Timed I/O PPS signal generator +------------------------------------ + +Intel Timed I/O is a high precision device, present on 2019 and newer Intel +CPUs, that can generate PPS signals. + +Timed I/O and system time are both driven by same hardware clock. The signal +is generated with a precision of ~20 nanoseconds. The generated PPS signal +is used to synchronize an external device with system clock. For example, +share your clock with a device that receives PPS signal, generated by +Timed I/O device. There are dedicated Timed I/O pins to deliver the PPS signal +to an external device. + +Usage of Intel Timed I/O as PPS generator: + +Start generating PPS signal:: + $echo 1 > /sys/devices/platform/INTCxxxx\:00/enable + +Stop generating PPS signal:: + $echo 0 > /sys/devices/platform/INTCxxxx\:00/enable -- 2.35.3
next prev parent reply other threads:[~2024-03-19 13:07 UTC|newest] Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-03-19 13:05 [PATCH v5 00/11] Add support for Intel PPS Generator lakshmi.sowjanya.d 2024-03-19 13:05 ` [Intel-wired-lan] " lakshmi.sowjanya.d 2024-03-19 13:05 ` [PATCH v5 01/11] x86/tsc: Add base clock properties in clocksource structure lakshmi.sowjanya.d 2024-03-19 13:05 ` [Intel-wired-lan] " lakshmi.sowjanya.d 2024-03-20 11:23 ` Thomas Gleixner 2024-03-20 11:23 ` [Intel-wired-lan] " Thomas Gleixner 2024-03-20 11:30 ` Thomas Gleixner 2024-03-20 11:30 ` [Intel-wired-lan] " Thomas Gleixner 2024-03-19 13:05 ` [PATCH v5 02/11] timekeeping: Add function to convert realtime to base clock lakshmi.sowjanya.d 2024-03-19 13:05 ` [Intel-wired-lan] " lakshmi.sowjanya.d 2024-03-19 22:29 ` John Stultz 2024-03-19 22:29 ` [Intel-wired-lan] " John Stultz 2024-03-20 11:29 ` Thomas Gleixner 2024-03-20 11:29 ` [Intel-wired-lan] " Thomas Gleixner 2024-03-21 14:53 ` Thomas Gleixner 2024-03-21 14:53 ` [Intel-wired-lan] " Thomas Gleixner 2024-04-01 13:07 ` D, Lakshmi Sowjanya 2024-04-01 13:07 ` [Intel-wired-lan] " D, Lakshmi Sowjanya 2024-03-19 13:05 ` [PATCH v5 03/11] e1000e: remove convert_art_to_tsc() lakshmi.sowjanya.d 2024-03-19 13:05 ` [Intel-wired-lan] " lakshmi.sowjanya.d 2024-03-19 13:05 ` [PATCH v5 04/11] igc: " lakshmi.sowjanya.d 2024-03-19 13:05 ` [Intel-wired-lan] " lakshmi.sowjanya.d 2024-03-19 13:05 ` [PATCH v5 05/11] stmmac: intel: " lakshmi.sowjanya.d 2024-03-19 13:05 ` [Intel-wired-lan] " lakshmi.sowjanya.d 2024-03-19 13:05 ` [PATCH v5 06/11] ALSA: hda: " lakshmi.sowjanya.d 2024-03-19 13:05 ` [Intel-wired-lan] " lakshmi.sowjanya.d 2024-03-19 13:05 ` [PATCH v5 07/11] ice/ptp: " lakshmi.sowjanya.d 2024-03-19 13:05 ` [Intel-wired-lan] " lakshmi.sowjanya.d 2024-03-19 13:05 ` [PATCH v5 08/11] x86/tsc: Remove art to tsc conversion functions which are obsolete lakshmi.sowjanya.d 2024-03-19 13:05 ` [Intel-wired-lan] " lakshmi.sowjanya.d 2024-03-19 13:05 ` [PATCH v5 09/11] pps: generators: Add PPS Generator TIO Driver lakshmi.sowjanya.d 2024-03-19 13:05 ` [Intel-wired-lan] " lakshmi.sowjanya.d 2024-03-20 16:17 ` Rodolfo Giometti 2024-03-20 16:17 ` [Intel-wired-lan] " Rodolfo Giometti 2024-03-19 13:05 ` lakshmi.sowjanya.d [this message] 2024-03-19 13:05 ` [Intel-wired-lan] [PATCH v5 10/11] Documentation: driver-api: pps: Add Intel Timed I/O PPS generator lakshmi.sowjanya.d 2024-03-20 16:18 ` Rodolfo Giometti 2024-03-20 16:18 ` [Intel-wired-lan] " Rodolfo Giometti 2024-03-19 13:05 ` [PATCH v5 11/11] ABI: pps: Add ABI documentation for Intel TIO lakshmi.sowjanya.d 2024-03-19 13:05 ` [Intel-wired-lan] " lakshmi.sowjanya.d 2024-03-20 16:09 ` Simon Horman 2024-03-20 16:09 ` [Intel-wired-lan] " Simon Horman 2024-03-19 22:48 ` [Intel-wired-lan] [PATCH v5 00/11] Add support for Intel PPS Generator Paul Menzel 2024-03-19 22:48 ` Paul Menzel
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20240319130547.4195-11-lakshmi.sowjanya.d@intel.com \ --to=lakshmi.sowjanya.d@intel.com \ --cc=alexandre.torgue@foss.st.com \ --cc=andriy.shevchenko@linux.intel.com \ --cc=anthony.l.nguyen@intel.com \ --cc=basavaraj.goudar@intel.com \ --cc=christopher.s.hall@intel.com \ --cc=corbet@lwn.net \ --cc=davem@davemloft.net \ --cc=eddie.dong@intel.com \ --cc=giometti@enneenne.com \ --cc=intel-wired-lan@lists.osuosl.org \ --cc=jesse.brandeburg@intel.com \ --cc=joabreu@synopsys.com \ --cc=jstultz@google.com \ --cc=linux-doc@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-sound@vger.kernel.org \ --cc=mallikarjunappa.sangannavar@intel.com \ --cc=mcoquelin.stm32@gmail.com \ --cc=netdev@vger.kernel.org \ --cc=pandith.n@intel.com \ --cc=perex@perex.cz \ --cc=peter.hilber@opensynergy.com \ --cc=subramanian.mohan@intel.com \ --cc=tglx@linutronix.de \ --cc=thejesh.reddy.t.r@intel.com \ --cc=x86@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.