From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Helge Deller <deller@gmx.de>, Sven Schnelle <svens@stackframe.org>
Subject: [PULL 3/9] target/hppa: Fix assemble_12a insns for wide mode
Date: Tue, 19 Mar 2024 14:32:17 -1000 [thread overview]
Message-ID: <20240320003223.554145-4-richard.henderson@linaro.org> (raw)
In-Reply-To: <20240320003223.554145-1-richard.henderson@linaro.org>
Tested-by: Helge Deller <deller@gmx.de>
Reported-by: Sven Schnelle <svens@stackframe.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/insns.decode | 27 ++++++++++++++++-----------
target/hppa/translate.c | 17 +++++++++++++++++
2 files changed, 33 insertions(+), 11 deletions(-)
diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode
index 9c6f92444c..5412ff9836 100644
--- a/target/hppa/insns.decode
+++ b/target/hppa/insns.decode
@@ -26,7 +26,7 @@
%assemble_11a 4:12 0:1 !function=expand_11a
%assemble_12 0:s1 2:1 3:10 !function=expand_shl2
-%assemble_12a 0:s1 3:11 !function=expand_shl2
+%assemble_12a 3:13 0:1 !function=expand_12a
%assemble_16 0:16 !function=expand_16
%assemble_17 0:s1 16:5 2:1 3:10 !function=expand_shl2
%assemble_22 0:s1 16:10 2:1 3:10 !function=expand_shl2
@@ -314,8 +314,9 @@ fstd 001011 ..... ..... .. . 1 -- 100 0 . ..... @fldstdi
@ldstim14m ...... b:5 t:5 ................ \
&ldst sp=%assemble_sp disp=%assemble_16 \
x=0 scale=0 m=%neg_to_m
-@ldstim12m ...... b:5 t:5 sp:2 .............. \
- &ldst disp=%assemble_12a x=0 scale=0 m=%pos_to_m
+@ldstim12m ...... b:5 t:5 ................ \
+ &ldst sp=%assemble_sp disp=%assemble_12a \
+ x=0 scale=0 m=%pos_to_m
# LDB, LDH, LDW, LDWM
ld 010000 ..... ..... .. .............. @ldstim14 size=0
@@ -331,15 +332,19 @@ st 011010 ..... ..... .. .............. @ldstim14 size=2
st 011011 ..... ..... .. .............. @ldstim14m size=2
st 011111 ..... ..... .. ...........10. @ldstim12m size=2
-fldw 010110 b:5 ..... sp:2 .............. \
- &ldst disp=%assemble_12a t=%rm64 m=%a_to_m x=0 scale=0 size=2
-fldw 010111 b:5 ..... sp:2 ...........0.. \
- &ldst disp=%assemble_12a t=%rm64 m=0 x=0 scale=0 size=2
+fldw 010110 b:5 ..... ................ \
+ &ldst disp=%assemble_12a sp=%assemble_sp \
+ t=%rm64 m=%a_to_m x=0 scale=0 size=2
+fldw 010111 b:5 ..... .............0.. \
+ &ldst disp=%assemble_12a sp=%assemble_sp \
+ t=%rm64 m=0 x=0 scale=0 size=2
-fstw 011110 b:5 ..... sp:2 .............. \
- &ldst disp=%assemble_12a t=%rm64 m=%a_to_m x=0 scale=0 size=2
-fstw 011111 b:5 ..... sp:2 ...........0.. \
- &ldst disp=%assemble_12a t=%rm64 m=0 x=0 scale=0 size=2
+fstw 011110 b:5 ..... ................ \
+ &ldst disp=%assemble_12a sp=%assemble_sp \
+ t=%rm64 m=%a_to_m x=0 scale=0 size=2
+fstw 011111 b:5 ..... .............0.. \
+ &ldst disp=%assemble_12a sp=%assemble_sp \
+ t=%rm64 m=0 x=0 scale=0 size=2
ld 010100 ..... ..... .. ............0. @ldstim11
fldd 010100 ..... ..... .. ............1. @ldstim11
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 40b9ff6d59..be0b0494d0 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -155,6 +155,23 @@ static int expand_11a(DisasContext *ctx, int val)
return i;
}
+/* Expander for assemble_16a(s,im11a,i). */
+static int expand_12a(DisasContext *ctx, int val)
+{
+ /*
+ * @val is bit 0 and bits [3:15].
+ * Swizzle thing around depending on PSW.W.
+ */
+ int im11a = extract32(val, 1, 11);
+ int s = extract32(val, 12, 2);
+ int i = (-(val & 1) << 13) | (im11a << 2);
+
+ if (ctx->tb_flags & PSW_W) {
+ i ^= s << 13;
+ }
+ return i;
+}
+
/* Expander for assemble_16(s,im14). */
static int expand_16(DisasContext *ctx, int val)
{
--
2.34.1
next prev parent reply other threads:[~2024-03-20 0:32 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-20 0:32 [PULL 0/9] target/hppa fixes for 9.0 Richard Henderson
2024-03-20 0:32 ` [PULL 1/9] target/hppa: Fix assemble_16 insns for wide mode Richard Henderson
2024-03-20 0:32 ` [PULL 2/9] target/hppa: Fix assemble_11a " Richard Henderson
2024-03-20 0:32 ` Richard Henderson [this message]
2024-03-20 0:32 ` [PULL 4/9] target/hppa: ldcw,s uses static shift of 3 Richard Henderson
2024-03-20 0:32 ` [PULL 5/9] target/hppa: fix shrp for wide mode Richard Henderson
2024-03-20 0:32 ` [PULL 6/9] target/hppa: fix access_id check Richard Henderson
2024-03-20 0:32 ` [PULL 7/9] target/hppa: exit tb on flush cache instructions Richard Henderson
2024-03-20 0:32 ` [PULL 8/9] target/hppa: mask privilege bits in mfia Richard Henderson
2024-03-20 0:32 ` [PULL 9/9] target/hppa: fix do_stdby_e() Richard Henderson
2024-03-20 15:05 ` [PULL 0/9] target/hppa fixes for 9.0 Peter Maydell
2024-03-21 17:06 ` Michael Tokarev
2024-03-21 18:25 ` Sven Schnelle
2024-03-21 18:32 ` Helge Deller
2024-03-22 4:48 ` Michael Tokarev
2024-03-22 17:36 ` Richard Henderson
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