From: Song Gao <gaosong@loongson.cn>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Bibo Mao <maobibo@loongson.cn>
Subject: [PULL 1/3] hw/intc/loongarch_extioi: Fix interrupt routing update
Date: Wed, 20 Mar 2024 10:40:08 +0800 [thread overview]
Message-ID: <20240320024010.1659193-2-gaosong@loongson.cn> (raw)
In-Reply-To: <20240320024010.1659193-1-gaosong@loongson.cn>
From: Bibo Mao <maobibo@loongson.cn>
Interrupt number in loop sentence should be base irq plus
loop index, it is missing on checking whether the irq
is pending.
Fixes: 428a6ef4396 ("Add vmstate post_load support")
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240313093932.2653518-1-maobibo@loongson.cn>
---
hw/intc/loongarch_extioi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
index bdfa3b481e..0b358548eb 100644
--- a/hw/intc/loongarch_extioi.c
+++ b/hw/intc/loongarch_extioi.c
@@ -151,7 +151,7 @@ static inline void extioi_update_sw_coremap(LoongArchExtIOI *s, int irq,
continue;
}
- if (notify && test_bit(irq, (unsigned long *)s->isr)) {
+ if (notify && test_bit(irq + i, (unsigned long *)s->isr)) {
/*
* lower irq at old cpu and raise irq at new cpu
*/
--
2.25.1
next prev parent reply other threads:[~2024-03-20 2:41 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-20 2:40 [PULL 0/3] loongarch fixes for 9.0 Song Gao
2024-03-20 2:40 ` Song Gao [this message]
2024-03-20 2:40 ` [PULL 2/3] target/loongarch: Fix tlb huge page loading issue Song Gao
2024-03-21 17:10 ` Michael Tokarev
2024-03-20 2:40 ` [PULL 3/3] target/loongarch: Fix qemu-loongarch64 hang when executing 'll.d $t0, $t0, 0' Song Gao
2024-03-21 17:13 ` Michael Tokarev
2024-03-22 1:02 ` gaosong
2024-03-20 15:05 ` [PULL 0/3] loongarch fixes for 9.0 Peter Maydell
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