From: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr> To: linux-kernel@vger.kernel.org Cc: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>, Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>, Philipp Zabel <p.zabel@pengutronix.de>, Mauro Carvalho Chehab <mchehab@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Heiko Stuebner <heiko@sntech.de>, Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>, Robin Murphy <robin.murphy@arm.com>, Sebastian Reichel <sebastian.reichel@collabora.com>, Cristian Ciocaltea <cristian.ciocaltea@collabora.com>, Dragan Simic <dsimic@manjaro.org>, Shreeya Patel <shreeya.patel@collabora.com>, Chris Morgan <macromorgan@hotmail.com>, Andy Yan <andy.yan@rock-chips.com>, Nicolas Frattaroli <frattaroli.nicolas@gmail.com>, linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev Subject: [PATCH 3/4] arm64: dts: rockchip: Add VEPU121 to rk3588 Date: Wed, 20 Mar 2024 18:37:32 +0100 [thread overview] Message-ID: <20240320173736.2720778-4-linkmauve@linkmauve.fr> (raw) In-Reply-To: <20240320173736.2720778-1-linkmauve@linkmauve.fr> The TRM (version 1.0 page 385) lists five VEPU121 cores, but only four interrupts are listed (on page 24), so I’ve only enabled four of them for now. Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr> --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 80 +++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 2a23b4dc36e4..fe77b56ac9a0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -2488,6 +2488,86 @@ gpio4: gpio@fec50000 { }; }; + jpeg_enc0: video-codec@fdba0000 { + compatible = "rockchip,rk3588-vepu121"; + reg = <0x0 0xfdba0000 0x0 0x800>; + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER0>, <&cru HCLK_JPEG_ENCODER0>; + clock-names = "aclk", "hclk"; + iommus = <&jpeg_enc0_mmu>; + power-domains = <&power RK3588_PD_VDPU>; + }; + + jpeg_enc0_mmu: iommu@fdba0800 { + compatible = "rockchip,rk3588-iommu"; + reg = <0x0 0xfdba0800 0x0 0x40>; + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER0>, <&cru HCLK_JPEG_ENCODER0>; + clock-names = "aclk", "iface"; + power-domains = <&power RK3588_PD_VDPU>; + #iommu-cells = <0>; + }; + + jpeg_enc1: video-codec@fdba4000 { + compatible = "rockchip,rk3588-vepu121"; + reg = <0x0 0xfdba4000 0x0 0x800>; + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER1>, <&cru HCLK_JPEG_ENCODER1>; + clock-names = "aclk", "hclk"; + iommus = <&jpeg_enc1_mmu>; + power-domains = <&power RK3588_PD_VDPU>; + }; + + jpeg_enc1_mmu: iommu@fdba4800 { + compatible = "rockchip,rk3588-iommu"; + reg = <0x0 0xfdba4800 0x0 0x40>; + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER1>, <&cru HCLK_JPEG_ENCODER1>; + clock-names = "aclk", "iface"; + power-domains = <&power RK3588_PD_VDPU>; + #iommu-cells = <0>; + }; + + jpeg_enc2: video-codec@fdba8000 { + compatible = "rockchip,rk3588-vepu121"; + reg = <0x0 0xfdba8000 0x0 0x800>; + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER2>, <&cru HCLK_JPEG_ENCODER2>; + clock-names = "aclk", "hclk"; + iommus = <&jpeg_enc2_mmu>; + power-domains = <&power RK3588_PD_VDPU>; + }; + + jpeg_enc2_mmu: iommu@fdba8800 { + compatible = "rockchip,rk3588-iommu"; + reg = <0x0 0xfdba8800 0x0 0x40>; + interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER2>, <&cru HCLK_JPEG_ENCODER2>; + clock-names = "aclk", "iface"; + power-domains = <&power RK3588_PD_VDPU>; + #iommu-cells = <0>; + }; + + jpeg_enc3: video-codec@fdbac000 { + compatible = "rockchip,rk3588-vepu121"; + reg = <0x0 0xfdbac000 0x0 0x800>; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER3>, <&cru HCLK_JPEG_ENCODER3>; + clock-names = "aclk", "hclk"; + iommus = <&jpeg_enc3_mmu>; + power-domains = <&power RK3588_PD_VDPU>; + }; + + jpeg_enc3_mmu: iommu@fdbac800 { + compatible = "rockchip,rk3588-iommu"; + reg = <0x0 0xfdbac800 0x0 0x40>; + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER3>, <&cru HCLK_JPEG_ENCODER3>; + clock-names = "aclk", "iface"; + power-domains = <&power RK3588_PD_VDPU>; + #iommu-cells = <0>; + }; + av1d: video-codec@fdc70000 { compatible = "rockchip,rk3588-av1-vpu"; reg = <0x0 0xfdc70000 0x0 0x800>; -- 2.44.0 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr> To: linux-kernel@vger.kernel.org Cc: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>, Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>, Philipp Zabel <p.zabel@pengutronix.de>, Mauro Carvalho Chehab <mchehab@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Heiko Stuebner <heiko@sntech.de>, Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>, Robin Murphy <robin.murphy@arm.com>, Sebastian Reichel <sebastian.reichel@collabora.com>, Cristian Ciocaltea <cristian.ciocaltea@collabora.com>, Dragan Simic <dsimic@manjaro.org>, Shreeya Patel <shreeya.patel@collabora.com>, Chris Morgan <macromorgan@hotmail.com>, Andy Yan <andy.yan@rock-chips.com>, Nicolas Frattaroli <frattaroli.nicolas@gmail.com>, linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev Subject: [PATCH 3/4] arm64: dts: rockchip: Add VEPU121 to rk3588 Date: Wed, 20 Mar 2024 18:37:32 +0100 [thread overview] Message-ID: <20240320173736.2720778-4-linkmauve@linkmauve.fr> (raw) In-Reply-To: <20240320173736.2720778-1-linkmauve@linkmauve.fr> The TRM (version 1.0 page 385) lists five VEPU121 cores, but only four interrupts are listed (on page 24), so I’ve only enabled four of them for now. Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr> --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 80 +++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 2a23b4dc36e4..fe77b56ac9a0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -2488,6 +2488,86 @@ gpio4: gpio@fec50000 { }; }; + jpeg_enc0: video-codec@fdba0000 { + compatible = "rockchip,rk3588-vepu121"; + reg = <0x0 0xfdba0000 0x0 0x800>; + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER0>, <&cru HCLK_JPEG_ENCODER0>; + clock-names = "aclk", "hclk"; + iommus = <&jpeg_enc0_mmu>; + power-domains = <&power RK3588_PD_VDPU>; + }; + + jpeg_enc0_mmu: iommu@fdba0800 { + compatible = "rockchip,rk3588-iommu"; + reg = <0x0 0xfdba0800 0x0 0x40>; + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER0>, <&cru HCLK_JPEG_ENCODER0>; + clock-names = "aclk", "iface"; + power-domains = <&power RK3588_PD_VDPU>; + #iommu-cells = <0>; + }; + + jpeg_enc1: video-codec@fdba4000 { + compatible = "rockchip,rk3588-vepu121"; + reg = <0x0 0xfdba4000 0x0 0x800>; + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER1>, <&cru HCLK_JPEG_ENCODER1>; + clock-names = "aclk", "hclk"; + iommus = <&jpeg_enc1_mmu>; + power-domains = <&power RK3588_PD_VDPU>; + }; + + jpeg_enc1_mmu: iommu@fdba4800 { + compatible = "rockchip,rk3588-iommu"; + reg = <0x0 0xfdba4800 0x0 0x40>; + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER1>, <&cru HCLK_JPEG_ENCODER1>; + clock-names = "aclk", "iface"; + power-domains = <&power RK3588_PD_VDPU>; + #iommu-cells = <0>; + }; + + jpeg_enc2: video-codec@fdba8000 { + compatible = "rockchip,rk3588-vepu121"; + reg = <0x0 0xfdba8000 0x0 0x800>; + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER2>, <&cru HCLK_JPEG_ENCODER2>; + clock-names = "aclk", "hclk"; + iommus = <&jpeg_enc2_mmu>; + power-domains = <&power RK3588_PD_VDPU>; + }; + + jpeg_enc2_mmu: iommu@fdba8800 { + compatible = "rockchip,rk3588-iommu"; + reg = <0x0 0xfdba8800 0x0 0x40>; + interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER2>, <&cru HCLK_JPEG_ENCODER2>; + clock-names = "aclk", "iface"; + power-domains = <&power RK3588_PD_VDPU>; + #iommu-cells = <0>; + }; + + jpeg_enc3: video-codec@fdbac000 { + compatible = "rockchip,rk3588-vepu121"; + reg = <0x0 0xfdbac000 0x0 0x800>; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER3>, <&cru HCLK_JPEG_ENCODER3>; + clock-names = "aclk", "hclk"; + iommus = <&jpeg_enc3_mmu>; + power-domains = <&power RK3588_PD_VDPU>; + }; + + jpeg_enc3_mmu: iommu@fdbac800 { + compatible = "rockchip,rk3588-iommu"; + reg = <0x0 0xfdbac800 0x0 0x40>; + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru ACLK_JPEG_ENCODER3>, <&cru HCLK_JPEG_ENCODER3>; + clock-names = "aclk", "iface"; + power-domains = <&power RK3588_PD_VDPU>; + #iommu-cells = <0>; + }; + av1d: video-codec@fdc70000 { compatible = "rockchip,rk3588-av1-vpu"; reg = <0x0 0xfdc70000 0x0 0x800>; -- 2.44.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-03-20 17:38 UTC|newest] Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-03-20 17:37 [PATCH 0/4] Enable JPEG encoding on rk3588 Emmanuel Gil Peyrot 2024-03-20 17:37 ` Emmanuel Gil Peyrot 2024-03-20 17:37 ` [PATCH 1/4] dt-bindings: iommu: rockchip: Fix rk3588 variant Emmanuel Gil Peyrot 2024-03-20 17:37 ` Emmanuel Gil Peyrot 2024-03-20 19:15 ` Sebastian Reichel 2024-03-20 19:15 ` Sebastian Reichel 2024-03-20 19:15 ` Sebastian Reichel 2024-03-21 8:14 ` Krzysztof Kozlowski 2024-03-21 8:14 ` Krzysztof Kozlowski 2024-03-21 8:14 ` Krzysztof Kozlowski 2024-03-20 17:37 ` [PATCH 2/4] media: dt-binding: media: Document rk3588’s vepu121 Emmanuel Gil Peyrot 2024-03-20 17:37 ` Emmanuel Gil Peyrot 2024-03-20 20:16 ` Sebastian Reichel 2024-03-20 20:16 ` Sebastian Reichel 2024-03-20 20:16 ` Sebastian Reichel 2024-03-21 8:14 ` Krzysztof Kozlowski 2024-03-21 8:14 ` Krzysztof Kozlowski 2024-03-21 8:14 ` Krzysztof Kozlowski 2024-03-21 8:47 ` Heiko Stübner 2024-03-21 8:47 ` Heiko Stübner 2024-03-21 8:47 ` Heiko Stübner 2024-03-21 9:19 ` Krzysztof Kozlowski 2024-03-21 9:19 ` Krzysztof Kozlowski 2024-03-21 9:19 ` Krzysztof Kozlowski 2024-03-21 9:32 ` Heiko Stübner 2024-03-21 9:32 ` Heiko Stübner 2024-03-21 9:32 ` Heiko Stübner 2024-03-22 14:57 ` Nicolas Dufresne 2024-03-22 14:57 ` Nicolas Dufresne 2024-03-22 14:57 ` Nicolas Dufresne 2024-03-20 17:37 ` Emmanuel Gil Peyrot [this message] 2024-03-20 17:37 ` [PATCH 3/4] arm64: dts: rockchip: Add VEPU121 to rk3588 Emmanuel Gil Peyrot 2024-03-21 8:15 ` Krzysztof Kozlowski 2024-03-21 8:15 ` Krzysztof Kozlowski 2024-03-21 8:15 ` Krzysztof Kozlowski 2024-03-27 12:40 ` Link Mauve 2024-03-27 12:40 ` Link Mauve 2024-03-27 12:40 ` Link Mauve 2024-03-27 13:09 ` Sebastian Reichel 2024-03-27 13:09 ` Sebastian Reichel 2024-03-27 13:09 ` Sebastian Reichel 2024-03-20 17:37 ` [PATCH 4/4] media: verisilicon: Enable VEPU121 on rk3588 Emmanuel Gil Peyrot 2024-03-20 17:37 ` Emmanuel Gil Peyrot
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20240320173736.2720778-4-linkmauve@linkmauve.fr \ --to=linkmauve@linkmauve.fr \ --cc=andy.yan@rock-chips.com \ --cc=conor+dt@kernel.org \ --cc=cristian.ciocaltea@collabora.com \ --cc=devicetree@vger.kernel.org \ --cc=dsimic@manjaro.org \ --cc=ezequiel@vanguardiasur.com.ar \ --cc=frattaroli.nicolas@gmail.com \ --cc=heiko@sntech.de \ --cc=iommu@lists.linux.dev \ --cc=joro@8bytes.org \ --cc=krzysztof.kozlowski+dt@linaro.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-media@vger.kernel.org \ --cc=linux-rockchip@lists.infradead.org \ --cc=macromorgan@hotmail.com \ --cc=mchehab@kernel.org \ --cc=p.zabel@pengutronix.de \ --cc=robh@kernel.org \ --cc=robin.murphy@arm.com \ --cc=sebastian.reichel@collabora.com \ --cc=shreeya.patel@collabora.com \ --cc=will@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.