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From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 05/11] drm/i915/dp_mst: Account with the DSC DPT bpp limit on MTL
Date: Wed, 20 Mar 2024 22:11:45 +0200	[thread overview]
Message-ID: <20240320201152.3487892-6-imre.deak@intel.com> (raw)
In-Reply-To: <20240320201152.3487892-1-imre.deak@intel.com>

The DPT/DSC bpp limit should be accounted for on MTL platforms as well,
do so.

Bspec: 49259

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 79f34be5c89da..40660dc5edb45 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -56,7 +56,7 @@ static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp
 					  struct intel_crtc_state *crtc_state,
 					  bool dsc)
 {
-	if (intel_dp_is_uhbr(crtc_state) && DISPLAY_VER(i915) < 14 && dsc) {
+	if (intel_dp_is_uhbr(crtc_state) && DISPLAY_VER(i915) < 20 && dsc) {
 		int output_bpp = bpp;
 		int symbol_clock = intel_dp_link_symbol_clock(crtc_state->port_clock);
 		int available_bw = mul_u32_u32(symbol_clock * 72,
-- 
2.43.3


  parent reply	other threads:[~2024-03-20 20:11 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-20 20:11 [PATCH 00/11] drm/i915/dp: Few MTL/DSC and a UHBR monitor fix Imre Deak
2024-03-20 20:11 ` [PATCH 01/11] drm/i915/dp: Fix DSC line buffer depth programming Imre Deak
2024-03-26 10:00   ` Nautiyal, Ankit K
2024-03-26 19:50     ` Manasi Navare
2024-03-27 14:46       ` Imre Deak
2024-03-28 13:37   ` Imre Deak
2024-04-03 12:10     ` Jani Nikula
2024-03-20 20:11 ` [PATCH 02/11] drm/i915/dp_mst: Fix symbol clock when calculating the DSC DPT bpp limit Imre Deak
2024-03-26 10:01   ` Nautiyal, Ankit K
2024-03-26 20:04     ` Manasi Navare
2024-03-26 20:07       ` Manasi Navare
2024-03-20 20:11 ` [PATCH 03/11] drm/i915/dp_mst: Fix BW limit check when calculating DSC DPT bpp Imre Deak
2024-03-26 10:05   ` Nautiyal, Ankit K
2024-03-20 20:11 ` [PATCH 04/11] drm/i915/dp_mst: Account for channel coding efficiency in the DSC DPT bpp limit Imre Deak
2024-03-26 10:06   ` Nautiyal, Ankit K
2024-03-20 20:11 ` Imre Deak [this message]
2024-03-26 10:17   ` [PATCH 05/11] drm/i915/dp_mst: Account with the DSC DPT bpp limit on MTL Nautiyal, Ankit K
2024-03-26 10:21     ` Nautiyal, Ankit K
2024-03-26 12:11     ` Imre Deak
2024-03-26 12:59       ` Nautiyal, Ankit K
2024-03-29 18:39         ` Manasi Navare
2024-04-02 12:18           ` Imre Deak
2024-03-20 20:11 ` [PATCH 06/11] drm/i915/dp_mst: Sanitize calculating the DSC DPT bpp limit Imre Deak
2024-03-26 12:54   ` Nautiyal, Ankit K
2024-03-26 20:13     ` Manasi Navare
2024-03-27 14:50       ` Imre Deak
2024-03-20 20:11 ` [PATCH 07/11] drm/dp: Add drm_dp_uhbr_channel_coding_supported() Imre Deak
2024-03-26 12:53   ` Nautiyal, Ankit K
2024-03-26 20:14     ` Manasi Navare
2024-03-20 20:11 ` [PATCH 08/11] drm/dp_mst: Factor out drm_dp_mst_port_is_logical() Imre Deak
2024-03-26 12:52   ` Nautiyal, Ankit K
2024-03-20 20:11 ` [PATCH 09/11] drm/dp_mst: Add drm_dp_mst_aux_for_parent() Imre Deak
2024-03-27  9:00   ` Nautiyal, Ankit K
2024-03-27 14:25     ` Imre Deak
2024-03-28  3:27       ` Nautiyal, Ankit K
2024-03-20 20:11 ` [PATCH 10/11] drm/i915/dp_mst: Make HBLANK expansion quirk work for logical ports Imre Deak
2024-03-27  8:10   ` Nautiyal, Ankit K
2024-03-27 14:19     ` Imre Deak
2024-03-28  3:30       ` Nautiyal, Ankit K
2024-03-20 20:11 ` [PATCH 11/11] drm/i915/dp_mst: Enable HBLANK expansion quirk for UHBR rates Imre Deak
2024-03-27  8:54   ` Nautiyal, Ankit K
2024-03-20 23:51 ` [PATCH 00/11] drm/i915/dp: Few MTL/DSC and a UHBR monitor fix Almahallawy, Khaled
2024-03-21  1:39 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2024-03-21  1:39 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-03-21  1:54 ` ✓ Fi.CI.BAT: success " Patchwork
2024-03-21 12:39 ` ✗ Fi.CI.IGT: failure " Patchwork

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