From: Alistair Francis <alistair23@gmail.com>
To: qemu-devel@nongnu.org
Cc: alistair23@gmail.com,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Richard Henderson <richard.henderson@linaro.org>,
Alistair Francis <alistair.francis@wdc.com>
Subject: [PULL 03/15] trans_rvv.c.inc: set vstart = 0 in int scalar move insns
Date: Fri, 22 Mar 2024 18:53:07 +1000 [thread overview]
Message-ID: <20240322085319.1758843-4-alistair.francis@wdc.com> (raw)
In-Reply-To: <20240322085319.1758843-1-alistair.francis@wdc.com>
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
trans_vmv_x_s, trans_vmv_s_x, trans_vfmv_f_s and trans_vfmv_s_f aren't
setting vstart = 0 after execution. This is usually done by a helper in
vector_helper.c but these functions don't use helpers.
We'll set vstart after any potential 'over' brconds, and that will also
mandate a mark_vs_dirty() too.
Fixes: dedc53cbc9 ("target/riscv: rvv-1.0: integer scalar move instructions")
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240314175704.478276-3-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/insn_trans/trans_rvv.c.inc | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc
index e42728990e..8c16a9f5b3 100644
--- a/target/riscv/insn_trans/trans_rvv.c.inc
+++ b/target/riscv/insn_trans/trans_rvv.c.inc
@@ -3373,6 +3373,8 @@ static bool trans_vmv_x_s(DisasContext *s, arg_vmv_x_s *a)
vec_element_loadi(s, t1, a->rs2, 0, true);
tcg_gen_trunc_i64_tl(dest, t1);
gen_set_gpr(s, a->rd, dest);
+ tcg_gen_movi_tl(cpu_vstart, 0);
+ mark_vs_dirty(s);
return true;
}
return false;
@@ -3399,8 +3401,9 @@ static bool trans_vmv_s_x(DisasContext *s, arg_vmv_s_x *a)
s1 = get_gpr(s, a->rs1, EXT_NONE);
tcg_gen_ext_tl_i64(t1, s1);
vec_element_storei(s, a->rd, 0, t1);
- mark_vs_dirty(s);
gen_set_label(over);
+ tcg_gen_movi_tl(cpu_vstart, 0);
+ mark_vs_dirty(s);
return true;
}
return false;
@@ -3427,6 +3430,8 @@ static bool trans_vfmv_f_s(DisasContext *s, arg_vfmv_f_s *a)
}
mark_fs_dirty(s);
+ tcg_gen_movi_tl(cpu_vstart, 0);
+ mark_vs_dirty(s);
return true;
}
return false;
@@ -3452,8 +3457,9 @@ static bool trans_vfmv_s_f(DisasContext *s, arg_vfmv_s_f *a)
do_nanbox(s, t1, cpu_fpr[a->rs1]);
vec_element_storei(s, a->rd, 0, t1);
- mark_vs_dirty(s);
gen_set_label(over);
+ tcg_gen_movi_tl(cpu_vstart, 0);
+ mark_vs_dirty(s);
return true;
}
return false;
--
2.44.0
next prev parent reply other threads:[~2024-03-22 8:54 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-22 8:53 [PULL 00/15] riscv-to-apply queue Alistair Francis
2024-03-22 8:53 ` [PULL 01/15] target/riscv: do not enable all named features by default Alistair Francis
2024-03-22 8:53 ` [PULL 02/15] target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX() Alistair Francis
2024-03-22 8:53 ` Alistair Francis [this message]
2024-03-22 8:53 ` [PULL 04/15] target/riscv/vector_helper.c: fix 'vmvr_v' memcpy endianess Alistair Francis
2024-03-22 8:53 ` [PULL 05/15] target/riscv: always clear vstart in whole vec move insns Alistair Francis
2024-03-22 8:53 ` [PULL 06/15] target/riscv: always clear vstart for ldst_whole insns Alistair Francis
2024-03-22 8:53 ` [PULL 07/15] target/riscv/vector_helpers: do early exit when vstart >= vl Alistair Francis
2024-03-22 8:53 ` [PULL 08/15] target/riscv: remove 'over' brconds from vector trans Alistair Francis
2024-03-22 8:53 ` [PULL 09/15] trans_rvv.c.inc: remove redundant mark_vs_dirty() calls Alistair Francis
2024-03-22 8:53 ` [PULL 10/15] target/riscv: enable 'vstart_eq_zero' in the end of insns Alistair Francis
2024-03-22 8:53 ` [PULL 11/15] target/riscv/vector_helper.c: optimize loops in ldst helpers Alistair Francis
2024-03-22 8:53 ` [PULL 12/15] hw/intc: Update APLIC IDC after claiming iforce register Alistair Francis
2024-03-22 8:53 ` [PULL 13/15] target/riscv: rvv: Remove the dependency of Zvfbfmin to Zfbfmin Alistair Francis
2024-03-22 8:53 ` [PULL 14/15] target/riscv: Fix mode in riscv_tlb_fill Alistair Francis
2024-03-22 8:53 ` [PULL 15/15] target/riscv/kvm: fix timebase-frequency when using KVM acceleration Alistair Francis
2024-03-22 12:58 ` [PULL 00/15] riscv-to-apply queue Peter Maydell
2024-03-22 17:16 ` Michael Tokarev
2024-03-22 19:46 ` Daniel Henrique Barboza
2024-03-24 15:07 ` Michael Tokarev
2024-03-24 18:12 ` Daniel Henrique Barboza
2024-03-26 9:53 ` Michael Tokarev
2024-03-26 9:56 ` Alistair Francis
2024-03-26 12:09 ` Daniel Henrique Barboza
2024-03-27 10:13 ` Michael Tokarev
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