From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com>, Abel Vesa <abelvesa@kernel.org> Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peng Fan <peng.fan@nxp.com> Subject: [PATCH v5 2/4] dt-bindings: clock: support i.MX95 Display Master CSR module Date: Sun, 24 Mar 2024 15:52:01 +0800 [thread overview] Message-ID: <20240324-imx95-blk-ctl-v5-2-7a706174078a@nxp.com> (raw) In-Reply-To: <20240324-imx95-blk-ctl-v5-0-7a706174078a@nxp.com> From: Peng Fan <peng.fan@nxp.com> i.MX95 DISPLAY_MASTER_CSR includes registers to control DSI clock settings, clock gating, and pixel link select. Add dt-schema for it. Signed-off-by: Peng Fan <peng.fan@nxp.com> --- .../clock/nxp,imx95-display-master-csr.yaml | 64 ++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-display-master-csr.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-display-master-csr.yaml new file mode 100644 index 000000000000..07f7412e7658 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-display-master-csr.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/nxp,imx95-display-master-csr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX95 Display Master Block Control + +maintainers: + - Peng Fan <peng.fan@nxp.com> + +properties: + compatible: + items: + - const: nxp,imx95-display-master-csr + - const: syscon + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 1 + + '#clock-cells': + const: 1 + description: + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See + include/dt-bindings/clock/nxp,imx95-clock.h + + mux-controller: + type: object + $ref: /schemas/mux/reg-mux.yaml + +required: + - compatible + - reg + - '#clock-cells' + - mux-controller + - power-domains + - clocks + +additionalProperties: false + +examples: + - | + syscon@4c410000 { + compatible = "nxp,imx95-display-master-csr", "syscon"; + reg = <0x4c410000 0x10000>; + #clock-cells = <1>; + clocks = <&scmi_clk 62>; + power-domains = <&scmi_devpd 3>; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x4 0x00000001>; /* Pixel_link_sel */ + idle-states = <0>; + }; + }; +... -- 2.37.1
WARNING: multiple messages have this Message-ID (diff)
From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com>, Abel Vesa <abelvesa@kernel.org> Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peng Fan <peng.fan@nxp.com> Subject: [PATCH v5 2/4] dt-bindings: clock: support i.MX95 Display Master CSR module Date: Sun, 24 Mar 2024 15:52:01 +0800 [thread overview] Message-ID: <20240324-imx95-blk-ctl-v5-2-7a706174078a@nxp.com> (raw) In-Reply-To: <20240324-imx95-blk-ctl-v5-0-7a706174078a@nxp.com> From: Peng Fan <peng.fan@nxp.com> i.MX95 DISPLAY_MASTER_CSR includes registers to control DSI clock settings, clock gating, and pixel link select. Add dt-schema for it. Signed-off-by: Peng Fan <peng.fan@nxp.com> --- .../clock/nxp,imx95-display-master-csr.yaml | 64 ++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/nxp,imx95-display-master-csr.yaml b/Documentation/devicetree/bindings/clock/nxp,imx95-display-master-csr.yaml new file mode 100644 index 000000000000..07f7412e7658 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-display-master-csr.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/nxp,imx95-display-master-csr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX95 Display Master Block Control + +maintainers: + - Peng Fan <peng.fan@nxp.com> + +properties: + compatible: + items: + - const: nxp,imx95-display-master-csr + - const: syscon + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 1 + + '#clock-cells': + const: 1 + description: + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See + include/dt-bindings/clock/nxp,imx95-clock.h + + mux-controller: + type: object + $ref: /schemas/mux/reg-mux.yaml + +required: + - compatible + - reg + - '#clock-cells' + - mux-controller + - power-domains + - clocks + +additionalProperties: false + +examples: + - | + syscon@4c410000 { + compatible = "nxp,imx95-display-master-csr", "syscon"; + reg = <0x4c410000 0x10000>; + #clock-cells = <1>; + clocks = <&scmi_clk 62>; + power-domains = <&scmi_devpd 3>; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x4 0x00000001>; /* Pixel_link_sel */ + idle-states = <0>; + }; + }; +... -- 2.37.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-03-24 7:44 UTC|newest] Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-03-24 7:51 [PATCH v5 0/4] Add support i.MX95 BLK CTL module clock features Peng Fan (OSS) 2024-03-24 7:51 ` Peng Fan (OSS) 2024-03-24 7:52 ` [PATCH v5 1/4] dt-bindings: clock: support i.MX95 BLK CTL module Peng Fan (OSS) 2024-03-24 7:52 ` Peng Fan (OSS) 2024-03-25 19:24 ` Krzysztof Kozlowski 2024-03-25 19:24 ` Krzysztof Kozlowski 2024-03-31 11:58 ` Peng Fan 2024-03-31 11:58 ` Peng Fan 2024-03-31 19:54 ` Krzysztof Kozlowski 2024-03-31 19:54 ` Krzysztof Kozlowski 2024-03-24 7:52 ` Peng Fan (OSS) [this message] 2024-03-24 7:52 ` [PATCH v5 2/4] dt-bindings: clock: support i.MX95 Display Master CSR module Peng Fan (OSS) 2024-03-25 19:23 ` Krzysztof Kozlowski 2024-03-25 19:23 ` Krzysztof Kozlowski 2024-03-24 7:52 ` [PATCH v5 3/4] dt-bindings: clock: add i.MX95 clock header Peng Fan (OSS) 2024-03-24 7:52 ` Peng Fan (OSS) 2024-03-25 19:22 ` Krzysztof Kozlowski 2024-03-25 19:22 ` Krzysztof Kozlowski 2024-04-01 7:26 ` Peng Fan 2024-04-01 7:26 ` Peng Fan 2024-04-01 9:51 ` Krzysztof Kozlowski 2024-04-01 9:51 ` Krzysztof Kozlowski 2024-03-24 7:52 ` [PATCH v5 4/4] clk: imx: add i.MX95 BLK CTL clk driver Peng Fan (OSS) 2024-03-24 7:52 ` Peng Fan (OSS) 2024-03-25 19:25 ` Krzysztof Kozlowski 2024-03-25 19:25 ` Krzysztof Kozlowski 2024-03-31 12:01 ` Peng Fan 2024-03-31 12:01 ` Peng Fan 2024-03-31 19:52 ` Krzysztof Kozlowski 2024-03-31 19:52 ` Krzysztof Kozlowski 2024-03-25 19:21 ` [PATCH v5 0/4] Add support i.MX95 BLK CTL module clock features Krzysztof Kozlowski 2024-03-25 19:21 ` Krzysztof Kozlowski 2024-03-31 12:00 ` Peng Fan 2024-03-31 12:00 ` Peng Fan 2024-03-31 19:53 ` Krzysztof Kozlowski 2024-03-31 19:53 ` Krzysztof Kozlowski 2024-04-01 1:32 ` Peng Fan 2024-04-01 1:32 ` Peng Fan
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