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From: Bard Liao <yung-chuan.liao@linux.intel.com>
To: linux-sound@vger.kernel.org, vkoul@kernel.org
Cc: vinod.koul@linaro.org, linux-kernel@vger.kernel.org,
	pierre-louis.bossart@linux.intel.com, bard.liao@intel.com
Subject: [PATCH 7/7] soundwire: intel_ace2x: set the clock source
Date: Tue, 26 Mar 2024 09:20:30 +0000	[thread overview]
Message-ID: <20240326092030.1062802-8-yung-chuan.liao@linux.intel.com> (raw)
In-Reply-To: <20240326092030.1062802-1-yung-chuan.liao@linux.intel.com>

From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>

Insert clock setup after power-up and before setting up the SYNCPRD,
per hardware recommendations.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
---
 drivers/soundwire/intel_ace2x.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/soundwire/intel_ace2x.c b/drivers/soundwire/intel_ace2x.c
index d8ae05cf3d57..43a348db83bf 100644
--- a/drivers/soundwire/intel_ace2x.c
+++ b/drivers/soundwire/intel_ace2x.c
@@ -33,6 +33,20 @@ static void intel_shim_vs_init(struct sdw_intel *sdw)
 	usleep_range(10, 15);
 }
 
+static void intel_shim_vs_set_clock_source(struct sdw_intel *sdw, u32 source)
+{
+	void __iomem *shim_vs = sdw->link_res->shim_vs;
+	u32 val;
+
+	val = intel_readl(shim_vs, SDW_SHIM2_INTEL_VS_LVSCTL);
+
+	u32p_replace_bits(&val, source, SDW_SHIM2_INTEL_VS_LVSCTL_MLCS);
+
+	intel_writel(shim_vs, SDW_SHIM2_INTEL_VS_LVSCTL, val);
+
+	dev_dbg(sdw->cdns.dev, "clock source %d LVSCTL %#x\n", source, val);
+}
+
 static int intel_shim_check_wake(struct sdw_intel *sdw)
 {
 	void __iomem *shim_vs;
@@ -100,6 +114,8 @@ static int intel_link_power_up(struct sdw_intel *sdw)
 		goto out;
 	}
 
+	intel_shim_vs_set_clock_source(sdw, clock_source);
+
 	if (!*shim_mask) {
 		/* we first need to program the SyncPRD/CPU registers */
 		dev_dbg(sdw->cdns.dev, "first link up, programming SYNCPRD\n");
-- 
2.34.1


  parent reply	other threads:[~2024-03-26  9:20 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-26  9:20 [PATCH 0/7] soundwire: add support for link clock source selection Bard Liao
2024-03-26  9:20 ` [PATCH 1/7] soundwire: cadence: show the bus frequency and frame shape Bard Liao
2024-03-26  9:20 ` [PATCH 2/7] soundwire: bus: extend base clock checks to 96 MHz Bard Liao
2024-03-26  9:20 ` [PATCH 3/7] soundwire: intel: add more values for SYNCPRD Bard Liao
2024-03-26  9:20 ` [PATCH 4/7] soundwire: intel: add support for MeteorLake additional clocks Bard Liao
2024-03-26  9:20 ` [PATCH 5/7] soundwire: intel_ace2x: move and extend clock selection Bard Liao
2024-03-26  9:20 ` [PATCH 6/7] soundwire: intel_ace2.x: power-up first before setting SYNCPRD Bard Liao
2024-03-26  9:20 ` Bard Liao [this message]
2024-04-05 11:52 ` [PATCH 0/7] soundwire: add support for link clock source selection Vinod Koul

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