From: Diogo Ivo <diogo.ivo@siemens.com> To: danishanwar@ti.com, rogerq@kernel.org, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org Cc: Diogo Ivo <diogo.ivo@siemens.com>, jan.kiszka@siemens.com, Conor Dooley <conor.dooley@microchip.com> Subject: [PATCH net-next v5 01/10] dt-bindings: net: Add support for AM65x SR1.0 in ICSSG Date: Tue, 26 Mar 2024 11:06:51 +0000 [thread overview] Message-ID: <20240326110709.26165-2-diogo.ivo@siemens.com> (raw) In-Reply-To: <20240326110709.26165-1-diogo.ivo@siemens.com> Silicon Revision 1.0 of the AM65x came with a slightly different ICSSG support: Only 2 PRUs per slice are available and instead 2 additional DMA channels are used for management purposes. We have no restrictions on specified PRUs, but the DMA channels need to be adjusted. Co-developed-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Diogo Ivo <diogo.ivo@siemens.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: MD Danish Anwar <danishanwar@ti.com> --- Changes in v5: - Added Reviewed-by tag from Danish Changes in v4: - Added Reviewed-by tags from Roger and Conor Changes in v3: - Fixed dt_binding_check error by moving allOf Changes in v2: - Removed explicit reference to SR2.0 - Moved sr1 to the SoC name - Expand dma-names list and adjust min/maxItems depending on SR1.0/2.0 .../bindings/net/ti,icssg-prueth.yaml | 35 +++++++++++++++---- 1 file changed, 29 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml index 229c8f32019f..e253fa786092 100644 --- a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml +++ b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml @@ -13,14 +13,12 @@ description: Ethernet based on the Programmable Real-Time Unit and Industrial Communication Subsystem. -allOf: - - $ref: /schemas/remoteproc/ti,pru-consumer.yaml# - properties: compatible: enum: - - ti,am642-icssg-prueth # for AM64x SoC family - - ti,am654-icssg-prueth # for AM65x SoC family + - ti,am642-icssg-prueth # for AM64x SoC family + - ti,am654-icssg-prueth # for AM65x SoC family + - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0 sram: $ref: /schemas/types.yaml#/definitions/phandle @@ -28,9 +26,11 @@ properties: phandle to MSMC SRAM node dmas: - maxItems: 10 + minItems: 10 + maxItems: 12 dma-names: + minItems: 10 items: - const: tx0-0 - const: tx0-1 @@ -42,6 +42,8 @@ properties: - const: tx1-3 - const: rx0 - const: rx1 + - const: rxmgm0 + - const: rxmgm1 ti,mii-g-rt: $ref: /schemas/types.yaml#/definitions/phandle @@ -132,6 +134,27 @@ required: - interrupts - interrupt-names +allOf: + - $ref: /schemas/remoteproc/ti,pru-consumer.yaml# + + - if: + properties: + compatible: + contains: + const: ti,am654-sr1-icssg-prueth + then: + properties: + dmas: + minItems: 12 + dma-names: + minItems: 12 + else: + properties: + dmas: + maxItems: 10 + dma-names: + maxItems: 10 + unevaluatedProperties: false examples: -- 2.44.0
WARNING: multiple messages have this Message-ID (diff)
From: Diogo Ivo <diogo.ivo@siemens.com> To: danishanwar@ti.com, rogerq@kernel.org, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org Cc: Diogo Ivo <diogo.ivo@siemens.com>, jan.kiszka@siemens.com, Conor Dooley <conor.dooley@microchip.com> Subject: [PATCH net-next v5 01/10] dt-bindings: net: Add support for AM65x SR1.0 in ICSSG Date: Tue, 26 Mar 2024 11:06:51 +0000 [thread overview] Message-ID: <20240326110709.26165-2-diogo.ivo@siemens.com> (raw) In-Reply-To: <20240326110709.26165-1-diogo.ivo@siemens.com> Silicon Revision 1.0 of the AM65x came with a slightly different ICSSG support: Only 2 PRUs per slice are available and instead 2 additional DMA channels are used for management purposes. We have no restrictions on specified PRUs, but the DMA channels need to be adjusted. Co-developed-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Diogo Ivo <diogo.ivo@siemens.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: MD Danish Anwar <danishanwar@ti.com> --- Changes in v5: - Added Reviewed-by tag from Danish Changes in v4: - Added Reviewed-by tags from Roger and Conor Changes in v3: - Fixed dt_binding_check error by moving allOf Changes in v2: - Removed explicit reference to SR2.0 - Moved sr1 to the SoC name - Expand dma-names list and adjust min/maxItems depending on SR1.0/2.0 .../bindings/net/ti,icssg-prueth.yaml | 35 +++++++++++++++---- 1 file changed, 29 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml index 229c8f32019f..e253fa786092 100644 --- a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml +++ b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml @@ -13,14 +13,12 @@ description: Ethernet based on the Programmable Real-Time Unit and Industrial Communication Subsystem. -allOf: - - $ref: /schemas/remoteproc/ti,pru-consumer.yaml# - properties: compatible: enum: - - ti,am642-icssg-prueth # for AM64x SoC family - - ti,am654-icssg-prueth # for AM65x SoC family + - ti,am642-icssg-prueth # for AM64x SoC family + - ti,am654-icssg-prueth # for AM65x SoC family + - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0 sram: $ref: /schemas/types.yaml#/definitions/phandle @@ -28,9 +26,11 @@ properties: phandle to MSMC SRAM node dmas: - maxItems: 10 + minItems: 10 + maxItems: 12 dma-names: + minItems: 10 items: - const: tx0-0 - const: tx0-1 @@ -42,6 +42,8 @@ properties: - const: tx1-3 - const: rx0 - const: rx1 + - const: rxmgm0 + - const: rxmgm1 ti,mii-g-rt: $ref: /schemas/types.yaml#/definitions/phandle @@ -132,6 +134,27 @@ required: - interrupts - interrupt-names +allOf: + - $ref: /schemas/remoteproc/ti,pru-consumer.yaml# + + - if: + properties: + compatible: + contains: + const: ti,am654-sr1-icssg-prueth + then: + properties: + dmas: + minItems: 12 + dma-names: + minItems: 12 + else: + properties: + dmas: + maxItems: 10 + dma-names: + maxItems: 10 + unevaluatedProperties: false examples: -- 2.44.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-03-26 11:07 UTC|newest] Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-03-26 11:06 [PATCH net-next v5 00/10] Support ICSSG-based Ethernet on AM65x SR1.0 devices Diogo Ivo 2024-03-26 11:06 ` Diogo Ivo 2024-03-26 11:06 ` Diogo Ivo [this message] 2024-03-26 11:06 ` [PATCH net-next v5 01/10] dt-bindings: net: Add support for AM65x SR1.0 in ICSSG Diogo Ivo 2024-03-26 11:06 ` [PATCH net-next v5 02/10] eth: Move IPv4/IPv6 multicast address bases to their own symbols Diogo Ivo 2024-03-26 11:06 ` [PATCH net-next v5 03/10] net: ti: icssg-prueth: Move common functions into a separate file Diogo Ivo 2024-03-26 11:06 ` Diogo Ivo 2024-03-26 11:06 ` [PATCH net-next v5 04/10] net: ti: icssg-prueth: Add SR1.0-specific configuration bits Diogo Ivo 2024-03-26 11:06 ` Diogo Ivo 2024-03-26 11:06 ` [PATCH net-next v5 05/10] net: ti: icssg-prueth: Add SR1.0-specific description bits Diogo Ivo 2024-03-26 11:06 ` Diogo Ivo 2024-03-26 11:06 ` [PATCH net-next v5 06/10] net: ti: icssg-prueth: Adjust IPG configuration for SR1.0 Diogo Ivo 2024-03-26 11:06 ` Diogo Ivo 2024-03-26 11:06 ` [PATCH net-next v5 07/10] net: ti: icssg-prueth: Adjust the number of TX channels " Diogo Ivo 2024-03-26 11:06 ` Diogo Ivo 2024-03-26 11:06 ` [PATCH net-next v5 08/10] net: ti: icssg-prueth: Add functions to configure SR1.0 packet classifier Diogo Ivo 2024-03-26 11:06 ` Diogo Ivo 2024-03-26 11:06 ` [PATCH net-next v5 09/10] net: ti: icssg-prueth: Modify common functions for SR1.0 Diogo Ivo 2024-03-26 11:06 ` Diogo Ivo 2024-03-26 11:07 ` [PATCH net-next v5 10/10] net: ti: icssg-prueth: Add ICSSG Ethernet driver for AM65x SR1.0 platforms Diogo Ivo 2024-03-26 11:07 ` Diogo Ivo 2024-03-27 15:03 ` Simon Horman 2024-03-27 15:03 ` Simon Horman -- strict thread matches above, loose matches on Subject: below -- 2024-03-20 14:42 [PATCH net-next v5 00/10] Support ICSSG-based Ethernet on AM65x SR1.0 devices Diogo Ivo 2024-03-20 14:42 ` [PATCH net-next v5 01/10] dt-bindings: net: Add support for AM65x SR1.0 in ICSSG Diogo Ivo 2024-03-20 14:42 ` Diogo Ivo
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