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From: Claudiu <claudiu.beznea@tuxon.dev>
To: nobuhiro1.iwamatsu@toshiba.co.jp, pavel@denx.de
Cc: cip-dev@lists.cip-project.org, biju.das.jz@bp.renesas.com,
	prabhakar.mahadev-lad.rj@bp.renesas.com,
	claudiu.beznea@tuxon.dev
Subject: [PATCH 5.10.y-cip 33/36] dt-bindings: interrupt-controller: Add macros for NMI and IRQ0-7 interrupts present on RZ/G2L SoC
Date: Wed, 27 Mar 2024 10:17:53 +0200	[thread overview]
Message-ID: <20240327081756.2228036-34-claudiu.beznea.uj@bp.renesas.com> (raw)
In-Reply-To: <20240327081756.2228036-1-claudiu.beznea.uj@bp.renesas.com>

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

commit 80c4ece67b4050559e4e2417e77bbfd57e8b3899 upstream.

Add macros for NMI and IRQ0-7 interrupts which map to SPI0-8 present on
RZ/G2L (and alike) SoC's so that these can be used in the first cell of
interrupt specifiers.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220722151155.21100-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
 .../interrupt-controller/irqc-rzg2l.h         | 25 +++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 include/dt-bindings/interrupt-controller/irqc-rzg2l.h

diff --git a/include/dt-bindings/interrupt-controller/irqc-rzg2l.h b/include/dt-bindings/interrupt-controller/irqc-rzg2l.h
new file mode 100644
index 000000000000..34ce778885a1
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/irqc-rzg2l.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * This header provides constants for Renesas RZ/G2L family IRQC bindings.
+ *
+ * Copyright (C) 2022 Renesas Electronics Corp.
+ *
+ */
+
+#ifndef __DT_BINDINGS_IRQC_RZG2L_H
+#define __DT_BINDINGS_IRQC_RZG2L_H
+
+/* NMI maps to SPI0 */
+#define RZG2L_NMI	0
+
+/* IRQ0-7 map to SPI1-8 */
+#define RZG2L_IRQ0	1
+#define RZG2L_IRQ1	2
+#define RZG2L_IRQ2	3
+#define RZG2L_IRQ3	4
+#define RZG2L_IRQ4	5
+#define RZG2L_IRQ5	6
+#define RZG2L_IRQ6	7
+#define RZG2L_IRQ7	8
+
+#endif /* __DT_BINDINGS_IRQC_RZG2L_H */
-- 
2.39.2



  parent reply	other threads:[~2024-03-27 10:37 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-27  8:17 [PATCH 5.10.y-cip 00/36] Add IA55 interrupt controller support Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 01/36] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Document the properties to handle GPIO IRQ Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 02/36] pinctrl: renesas: rzg2l: Select GPIOLIB_IRQCHIP and IRQ_DOMAIN_HIERARCHY Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 03/36] pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 04/36] pinctrl: renesas: rzg2l: Fix configuring the GPIO pins as interrupts Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 05/36] pinctrl: renesas: rzg2l: Add BUILD_BUG_ON() checks Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 06/36] pinctrl: renesas: rzg2l: Use devm_clk_get_enabled() helper Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 07/36] pinctrl: renesas: rzg2l: Enhance driver to support interrupt affinity setting Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 08/36] dt-bindings: interrupt-controller: Add Renesas RZ/G2L Interrupt Controller Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 09/36] irqdomain: Make of_phandle_args_to_fwspec() generally available Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 10/36] of: platform: Skip populating IRQ to device resource table Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 11/36] irqchip: Add RZ/G2L IA55 Interrupt Controller driver Claudiu
2024-03-27 12:07   ` Pavel Machek
2024-03-28 11:44     ` claudiu beznea
2024-03-27  8:17 ` [PATCH 5.10.y-cip 12/36] irqchip: remove MODULE_LICENSE in non-modules Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 13/36] irqchip: renesas-rzg2l: Fix logic to clear TINT interrupt source Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 14/36] irqchip/renesas-rzg2l: Convert to irq_data_get_irq_chip_data() Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 15/36] irqchip/renesas-rzg2l: Enhance driver to support interrupt affinity setting Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 16/36] irqchip/renesas-rzg2l: Use tabs instead of spaces Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 17/36] irqchip/renesas-rzg2l: Align struct member names to tabs Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 18/36] irqchip/renesas-rzg2l: Document structure members Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 19/36] irqchip/renesas-rzg2l: Implement restriction when writing ISCR register Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 20/36] irqchip/renesas-rzg2l: Add macro to retrieve TITSR register offset based on register's index Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 21/36] irqchip/renesas-rzg2l: Flush posted write in irq_eoi() Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 22/36] irqchip/renesas-rzg2l: Rename rzg2l_tint_eoi() Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 23/36] irqchip/renesas-rzg2l: Rename rzg2l_irq_eoi() Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 24/36] irqchip/renesas-rzg2l: Prevent spurious interrupts when setting trigger type Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 25/36] irqchip/renesas-rzg2l: Do not set TIEN and TINT source at the same time Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 26/36] soc: renesas: Kconfig: Enable IRQC driver for RZ/G2L SoC Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 27/36] arm64: dts: renesas: r9a07g043u: Add IRQC node Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 28/36] arm64: dts: renesas: r9a07g044: " Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 29/36] arm64: dts: renesas: r9a07g054: " Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 30/36] arm64: dts: renesas: r9a07g043u: Update pinctrl node to handle GPIO interrupts Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 31/36] arm64: dts: renesas: r9a07g044: " Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 32/36] arm64: dts: renesas: r9a07g054: " Claudiu
2024-03-27  8:17 ` Claudiu [this message]
2024-03-27  8:17 ` [PATCH 5.10.y-cip 34/36] arm64: dts: renesas: rzg2l-smarc-som: Add PHY interrupt support for ETH{0/1} Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 35/36] arm64: dts: renesas: rzg2lc-smarc-som: Add PHY interrupt support for ETH0 Claudiu
2024-03-27  8:17 ` [PATCH 5.10.y-cip 36/36] arm64: dts: renesas: rzg2ul-smarc-som: Add PHY interrupt support for ETH{0/1} Claudiu
2024-03-27 12:02 ` [PATCH 5.10.y-cip 00/36] Add IA55 interrupt controller support Pavel Machek
2024-03-28 10:45   ` Pavel Machek
2024-04-19 17:51 ` Krzysztof Kozlowski
2024-04-19 19:43   ` Pavel Machek
2024-04-20 11:20     ` Krzysztof Kozlowski
2024-04-21 14:11       ` Pavel Machek
2024-04-21 14:14         ` Krzysztof Kozlowski

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