From: Alexander Usyskin <alexander.usyskin@intel.com> To: Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Jani Nikula <jani.nikula@linux.intel.com>, Joonas Lahtinen <joonas.lahtinen@linux.intel.com>, Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Alexander Usyskin <alexander.usyskin@intel.com>, Vitaly Lubart <vitaly.lubart@intel.com>, linux-mtd@lists.infradead.org, intel-gfx@lists.freedesktop.org, Lucas De Marchi <lucas.demarchi@intel.com>, Tomas Winkler <tomas.winkler@intel.com> Subject: [PATCH 02/13] drm/i915/spi: add spi device for discrete graphics Date: Thu, 28 Mar 2024 14:22:25 +0200 [thread overview] Message-ID: <20240328122236.1718111-3-alexander.usyskin@intel.com> (raw) In-Reply-To: <20240328122236.1718111-1-alexander.usyskin@intel.com> Enable access to internal spi on DGFX devices via a child device. The spi child device is exposed via auxiliary bus. CC: Rodrigo Vivi <rodrigo.vivi@intel.com> CC: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> --- drivers/gpu/drm/i915/Makefile | 4 ++ drivers/gpu/drm/i915/i915_driver.c | 6 +++ drivers/gpu/drm/i915/i915_drv.h | 4 ++ drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/spi/intel_spi.c | 64 ++++++++++++++++++++++++++++ drivers/gpu/drm/i915/spi/intel_spi.h | 15 +++++++ 6 files changed, 94 insertions(+) create mode 100644 drivers/gpu/drm/i915/spi/intel_spi.c create mode 100644 drivers/gpu/drm/i915/spi/intel_spi.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index e777686190ca..2bd481862a48 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -239,6 +239,10 @@ i915-y += \ i915-y += \ gt/intel_gsc.o +# graphics spi device (DGFX) support +i915-y += \ + spi/intel_spi.o + # graphics hardware monitoring (HWMON) support i915-$(CONFIG_HWMON) += \ i915_hwmon.o diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index c7d7c3b7ecc6..716fa20c52ce 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -81,6 +81,8 @@ #include "soc/intel_dram.h" #include "soc/intel_gmch.h" +#include "spi/intel_spi.h" + #include "i915_debugfs.h" #include "i915_driver.h" #include "i915_drm_client.h" @@ -619,6 +621,8 @@ static void i915_driver_register(struct drm_i915_private *dev_priv) /* Depends on sysfs having been initialized */ i915_perf_register(dev_priv); + intel_spi_init(dev_priv); + for_each_gt(gt, dev_priv, i) intel_gt_driver_register(gt); @@ -662,6 +666,8 @@ static void i915_driver_unregister(struct drm_i915_private *dev_priv) i915_hwmon_unregister(dev_priv); + intel_spi_fini(dev_priv); + i915_perf_unregister(dev_priv); i915_pmu_unregister(dev_priv); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 861567362abd..e8e0d9ff4e66 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -34,6 +34,8 @@ #include <linux/pm_qos.h> +#include <linux/intel_dg_spi_aux.h> + #include <drm/ttm/ttm_device.h> #include "display/intel_display_limits.h" @@ -330,6 +332,8 @@ struct drm_i915_private { struct i915_perf perf; + struct intel_dg_spi_dev spi; + struct i915_hwmon *hwmon; struct intel_gt *gt[I915_MAX_GT]; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 27dc903f0553..8b2935e384e3 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -928,6 +928,7 @@ #define DG2_GSC_HECI2_BASE 0x00374000 #define MTL_GSC_HECI1_BASE 0x00116000 #define MTL_GSC_HECI2_BASE 0x00117000 +#define GEN12_GUNIT_SPI_BASE 0x00102040 #define HECI_H_CSR(base) _MMIO((base) + 0x4) #define HECI_H_CSR_IE REG_BIT(0) diff --git a/drivers/gpu/drm/i915/spi/intel_spi.c b/drivers/gpu/drm/i915/spi/intel_spi.c new file mode 100644 index 000000000000..17e4c7861ef5 --- /dev/null +++ b/drivers/gpu/drm/i915/spi/intel_spi.c @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright(c) 2019-2024, Intel Corporation. All rights reserved. + */ + +#include <linux/intel_dg_spi_aux.h> +#include <linux/irq.h> +#include "i915_reg.h" +#include "i915_drv.h" +#include "spi/intel_spi.h" + +#define GEN12_GUNIT_SPI_SIZE 0x80 + +static void i915_spi_release_dev(struct device *dev) +{ +} + +void intel_spi_init(struct drm_i915_private *dev_priv) +{ + struct intel_dg_spi_dev *spi = &dev_priv->spi; + struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); + struct auxiliary_device *aux_dev = &spi->aux_dev; + int ret; + + /* Only the DGFX devices have internal SPI */ + if (!IS_DGFX(dev_priv)) + return; + + spi->bar.parent = &pdev->resource[0]; + spi->bar.start = GEN12_GUNIT_SPI_BASE + pdev->resource[0].start; + spi->bar.end = spi->bar.start + GEN12_GUNIT_SPI_SIZE - 1; + spi->bar.flags = IORESOURCE_MEM; + spi->bar.desc = IORES_DESC_NONE; + + aux_dev->name = "spi"; + aux_dev->id = (pci_domain_nr(pdev->bus) << 16) | + PCI_DEVID(pdev->bus->number, pdev->devfn); + aux_dev->dev.parent = &pdev->dev; + aux_dev->dev.release = i915_spi_release_dev; + + ret = auxiliary_device_init(aux_dev); + if (ret) { + dev_err(&pdev->dev, "i915-spi aux init failed %d\n", ret); + return; + } + + ret = auxiliary_device_add(aux_dev); + if (ret) { + dev_err(&pdev->dev, "i915-spi aux add failed %d\n", ret); + auxiliary_device_uninit(aux_dev); + return; + } +} + +void intel_spi_fini(struct drm_i915_private *dev_priv) +{ + struct intel_dg_spi_dev *spi = &dev_priv->spi; + struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); + + dev_dbg(&pdev->dev, "removing i915-spi cell\n"); + + auxiliary_device_delete(&spi->aux_dev); + auxiliary_device_uninit(&spi->aux_dev); +} diff --git a/drivers/gpu/drm/i915/spi/intel_spi.h b/drivers/gpu/drm/i915/spi/intel_spi.h new file mode 100644 index 000000000000..ed4153401f5d --- /dev/null +++ b/drivers/gpu/drm/i915/spi/intel_spi.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright(c) 2019-2024 Intel Corporation. All rights reserved. + */ + +#ifndef __INTEL_SPI_H__ +#define __INTEL_SPI_H__ + +struct drm_i915_private; + +void intel_spi_init(struct drm_i915_private *i915); + +void intel_spi_fini(struct drm_i915_private *i915); + +#endif /* __INTEL_SPI_H__ */ -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Alexander Usyskin <alexander.usyskin@intel.com> To: Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Jani Nikula <jani.nikula@linux.intel.com>, Joonas Lahtinen <joonas.lahtinen@linux.intel.com>, Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Alexander Usyskin <alexander.usyskin@intel.com>, Vitaly Lubart <vitaly.lubart@intel.com>, linux-mtd@lists.infradead.org, intel-gfx@lists.freedesktop.org, Lucas De Marchi <lucas.demarchi@intel.com>, Tomas Winkler <tomas.winkler@intel.com> Subject: [PATCH 02/13] drm/i915/spi: add spi device for discrete graphics Date: Thu, 28 Mar 2024 14:22:25 +0200 [thread overview] Message-ID: <20240328122236.1718111-3-alexander.usyskin@intel.com> (raw) In-Reply-To: <20240328122236.1718111-1-alexander.usyskin@intel.com> Enable access to internal spi on DGFX devices via a child device. The spi child device is exposed via auxiliary bus. CC: Rodrigo Vivi <rodrigo.vivi@intel.com> CC: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> --- drivers/gpu/drm/i915/Makefile | 4 ++ drivers/gpu/drm/i915/i915_driver.c | 6 +++ drivers/gpu/drm/i915/i915_drv.h | 4 ++ drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/spi/intel_spi.c | 64 ++++++++++++++++++++++++++++ drivers/gpu/drm/i915/spi/intel_spi.h | 15 +++++++ 6 files changed, 94 insertions(+) create mode 100644 drivers/gpu/drm/i915/spi/intel_spi.c create mode 100644 drivers/gpu/drm/i915/spi/intel_spi.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index e777686190ca..2bd481862a48 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -239,6 +239,10 @@ i915-y += \ i915-y += \ gt/intel_gsc.o +# graphics spi device (DGFX) support +i915-y += \ + spi/intel_spi.o + # graphics hardware monitoring (HWMON) support i915-$(CONFIG_HWMON) += \ i915_hwmon.o diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index c7d7c3b7ecc6..716fa20c52ce 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -81,6 +81,8 @@ #include "soc/intel_dram.h" #include "soc/intel_gmch.h" +#include "spi/intel_spi.h" + #include "i915_debugfs.h" #include "i915_driver.h" #include "i915_drm_client.h" @@ -619,6 +621,8 @@ static void i915_driver_register(struct drm_i915_private *dev_priv) /* Depends on sysfs having been initialized */ i915_perf_register(dev_priv); + intel_spi_init(dev_priv); + for_each_gt(gt, dev_priv, i) intel_gt_driver_register(gt); @@ -662,6 +666,8 @@ static void i915_driver_unregister(struct drm_i915_private *dev_priv) i915_hwmon_unregister(dev_priv); + intel_spi_fini(dev_priv); + i915_perf_unregister(dev_priv); i915_pmu_unregister(dev_priv); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 861567362abd..e8e0d9ff4e66 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -34,6 +34,8 @@ #include <linux/pm_qos.h> +#include <linux/intel_dg_spi_aux.h> + #include <drm/ttm/ttm_device.h> #include "display/intel_display_limits.h" @@ -330,6 +332,8 @@ struct drm_i915_private { struct i915_perf perf; + struct intel_dg_spi_dev spi; + struct i915_hwmon *hwmon; struct intel_gt *gt[I915_MAX_GT]; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 27dc903f0553..8b2935e384e3 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -928,6 +928,7 @@ #define DG2_GSC_HECI2_BASE 0x00374000 #define MTL_GSC_HECI1_BASE 0x00116000 #define MTL_GSC_HECI2_BASE 0x00117000 +#define GEN12_GUNIT_SPI_BASE 0x00102040 #define HECI_H_CSR(base) _MMIO((base) + 0x4) #define HECI_H_CSR_IE REG_BIT(0) diff --git a/drivers/gpu/drm/i915/spi/intel_spi.c b/drivers/gpu/drm/i915/spi/intel_spi.c new file mode 100644 index 000000000000..17e4c7861ef5 --- /dev/null +++ b/drivers/gpu/drm/i915/spi/intel_spi.c @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright(c) 2019-2024, Intel Corporation. All rights reserved. + */ + +#include <linux/intel_dg_spi_aux.h> +#include <linux/irq.h> +#include "i915_reg.h" +#include "i915_drv.h" +#include "spi/intel_spi.h" + +#define GEN12_GUNIT_SPI_SIZE 0x80 + +static void i915_spi_release_dev(struct device *dev) +{ +} + +void intel_spi_init(struct drm_i915_private *dev_priv) +{ + struct intel_dg_spi_dev *spi = &dev_priv->spi; + struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); + struct auxiliary_device *aux_dev = &spi->aux_dev; + int ret; + + /* Only the DGFX devices have internal SPI */ + if (!IS_DGFX(dev_priv)) + return; + + spi->bar.parent = &pdev->resource[0]; + spi->bar.start = GEN12_GUNIT_SPI_BASE + pdev->resource[0].start; + spi->bar.end = spi->bar.start + GEN12_GUNIT_SPI_SIZE - 1; + spi->bar.flags = IORESOURCE_MEM; + spi->bar.desc = IORES_DESC_NONE; + + aux_dev->name = "spi"; + aux_dev->id = (pci_domain_nr(pdev->bus) << 16) | + PCI_DEVID(pdev->bus->number, pdev->devfn); + aux_dev->dev.parent = &pdev->dev; + aux_dev->dev.release = i915_spi_release_dev; + + ret = auxiliary_device_init(aux_dev); + if (ret) { + dev_err(&pdev->dev, "i915-spi aux init failed %d\n", ret); + return; + } + + ret = auxiliary_device_add(aux_dev); + if (ret) { + dev_err(&pdev->dev, "i915-spi aux add failed %d\n", ret); + auxiliary_device_uninit(aux_dev); + return; + } +} + +void intel_spi_fini(struct drm_i915_private *dev_priv) +{ + struct intel_dg_spi_dev *spi = &dev_priv->spi; + struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); + + dev_dbg(&pdev->dev, "removing i915-spi cell\n"); + + auxiliary_device_delete(&spi->aux_dev); + auxiliary_device_uninit(&spi->aux_dev); +} diff --git a/drivers/gpu/drm/i915/spi/intel_spi.h b/drivers/gpu/drm/i915/spi/intel_spi.h new file mode 100644 index 000000000000..ed4153401f5d --- /dev/null +++ b/drivers/gpu/drm/i915/spi/intel_spi.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright(c) 2019-2024 Intel Corporation. All rights reserved. + */ + +#ifndef __INTEL_SPI_H__ +#define __INTEL_SPI_H__ + +struct drm_i915_private; + +void intel_spi_init(struct drm_i915_private *i915); + +void intel_spi_fini(struct drm_i915_private *i915); + +#endif /* __INTEL_SPI_H__ */ -- 2.34.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2024-03-28 12:26 UTC|newest] Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-03-28 12:22 [PATCH 00/13] spi: add driver for Intel discrete graphics Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 01/13] spi: add auxiliary device for intel dg spi Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-29 12:46 ` Krzysztof Kozlowski 2024-04-11 13:43 ` Usyskin, Alexander 2024-04-11 13:43 ` Usyskin, Alexander 2024-04-11 13:51 ` Krzysztof Kozlowski 2024-03-28 12:22 ` Alexander Usyskin [this message] 2024-03-28 12:22 ` [PATCH 02/13] drm/i915/spi: add spi device for discrete graphics Alexander Usyskin 2024-03-28 12:22 ` [PATCH 03/13] drm/i915/spi: add intel_spi_region map Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 04/13] drm/i915/spi: add support for access mode Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 05/13] spi: add driver for intel graphics on-die spi device Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-29 12:43 ` Krzysztof Kozlowski 2024-04-25 11:58 ` Usyskin, Alexander 2024-04-25 11:58 ` Usyskin, Alexander 2024-03-29 14:11 ` Lucas De Marchi 2024-03-29 14:11 ` Lucas De Marchi 2024-03-28 12:22 ` [PATCH 06/13] spi: intel-dg: implement region enumeration Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 07/13] spi: intel-dg: implement spi access functions Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 08/13] spi: intel-dg: spi register with mtd Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 09/13] spi: intel-dg: implement mtd access handlers Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 10/13] spi: intel-dg: align 64bit read and write Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 11/13] spi: intel-dg: wake card on operations Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 12/13] drm/xe/spi: add on-die spi device Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-29 12:46 ` Krzysztof Kozlowski 2024-03-28 12:22 ` [PATCH 13/13] drm/xe/spi: add support for access mode Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-29 1:15 ` ✗ Fi.CI.BUILD: failure for spi: add driver for Intel discrete graphics Patchwork
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