From: Alexander Usyskin <alexander.usyskin@intel.com> To: Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Jani Nikula <jani.nikula@linux.intel.com>, Joonas Lahtinen <joonas.lahtinen@linux.intel.com>, Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Alexander Usyskin <alexander.usyskin@intel.com>, Vitaly Lubart <vitaly.lubart@intel.com>, linux-mtd@lists.infradead.org, intel-gfx@lists.freedesktop.org Subject: [PATCH 04/13] drm/i915/spi: add support for access mode Date: Thu, 28 Mar 2024 14:22:27 +0200 [thread overview] Message-ID: <20240328122236.1718111-5-alexander.usyskin@intel.com> (raw) In-Reply-To: <20240328122236.1718111-1-alexander.usyskin@intel.com> Check SPI access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> --- drivers/gpu/drm/i915/spi/intel_spi.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/gpu/drm/i915/spi/intel_spi.c b/drivers/gpu/drm/i915/spi/intel_spi.c index 8dd4065551e2..747e43313c6f 100644 --- a/drivers/gpu/drm/i915/spi/intel_spi.c +++ b/drivers/gpu/drm/i915/spi/intel_spi.c @@ -10,6 +10,7 @@ #include "spi/intel_spi.h" #define GEN12_GUNIT_SPI_SIZE 0x80 +#define HECI_FW_STATUS_2_SPI_ACCESS_MODE BIT(3) static const struct intel_dg_spi_region regions[INTEL_DG_SPI_REGIONS] = { [0] = { .name = "DESCRIPTOR", }, @@ -22,6 +23,29 @@ static void i915_spi_release_dev(struct device *dev) { } +static bool i915_spi_writeable_override(struct drm_i915_private *dev_priv) +{ + struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); + resource_size_t base; + bool writeable_override; + + if (IS_DG1(dev_priv)) { + base = DG1_GSC_HECI2_BASE; + } else if (IS_DG2(dev_priv)) { + base = DG2_GSC_HECI2_BASE; + } else { + dev_err(&pdev->dev, "Unknown platform\n"); + return true; + } + + writeable_override = + !(intel_uncore_read(&dev_priv->uncore, HECI_FWSTS(base, 2)) & + HECI_FW_STATUS_2_SPI_ACCESS_MODE); + if (writeable_override) + dev_info(&pdev->dev, "SPI access overridden by jumper\n"); + return writeable_override; +} + void intel_spi_init(struct drm_i915_private *dev_priv) { struct intel_dg_spi_dev *spi = &dev_priv->spi; @@ -33,6 +57,7 @@ void intel_spi_init(struct drm_i915_private *dev_priv) if (!IS_DGFX(dev_priv)) return; + spi->writeable_override = i915_spi_writeable_override(dev_priv); spi->bar.parent = &pdev->resource[0]; spi->bar.start = GEN12_GUNIT_SPI_BASE + pdev->resource[0].start; spi->bar.end = spi->bar.start + GEN12_GUNIT_SPI_SIZE - 1; -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Alexander Usyskin <alexander.usyskin@intel.com> To: Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Jani Nikula <jani.nikula@linux.intel.com>, Joonas Lahtinen <joonas.lahtinen@linux.intel.com>, Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Alexander Usyskin <alexander.usyskin@intel.com>, Vitaly Lubart <vitaly.lubart@intel.com>, linux-mtd@lists.infradead.org, intel-gfx@lists.freedesktop.org Subject: [PATCH 04/13] drm/i915/spi: add support for access mode Date: Thu, 28 Mar 2024 14:22:27 +0200 [thread overview] Message-ID: <20240328122236.1718111-5-alexander.usyskin@intel.com> (raw) In-Reply-To: <20240328122236.1718111-1-alexander.usyskin@intel.com> Check SPI access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> --- drivers/gpu/drm/i915/spi/intel_spi.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/gpu/drm/i915/spi/intel_spi.c b/drivers/gpu/drm/i915/spi/intel_spi.c index 8dd4065551e2..747e43313c6f 100644 --- a/drivers/gpu/drm/i915/spi/intel_spi.c +++ b/drivers/gpu/drm/i915/spi/intel_spi.c @@ -10,6 +10,7 @@ #include "spi/intel_spi.h" #define GEN12_GUNIT_SPI_SIZE 0x80 +#define HECI_FW_STATUS_2_SPI_ACCESS_MODE BIT(3) static const struct intel_dg_spi_region regions[INTEL_DG_SPI_REGIONS] = { [0] = { .name = "DESCRIPTOR", }, @@ -22,6 +23,29 @@ static void i915_spi_release_dev(struct device *dev) { } +static bool i915_spi_writeable_override(struct drm_i915_private *dev_priv) +{ + struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); + resource_size_t base; + bool writeable_override; + + if (IS_DG1(dev_priv)) { + base = DG1_GSC_HECI2_BASE; + } else if (IS_DG2(dev_priv)) { + base = DG2_GSC_HECI2_BASE; + } else { + dev_err(&pdev->dev, "Unknown platform\n"); + return true; + } + + writeable_override = + !(intel_uncore_read(&dev_priv->uncore, HECI_FWSTS(base, 2)) & + HECI_FW_STATUS_2_SPI_ACCESS_MODE); + if (writeable_override) + dev_info(&pdev->dev, "SPI access overridden by jumper\n"); + return writeable_override; +} + void intel_spi_init(struct drm_i915_private *dev_priv) { struct intel_dg_spi_dev *spi = &dev_priv->spi; @@ -33,6 +57,7 @@ void intel_spi_init(struct drm_i915_private *dev_priv) if (!IS_DGFX(dev_priv)) return; + spi->writeable_override = i915_spi_writeable_override(dev_priv); spi->bar.parent = &pdev->resource[0]; spi->bar.start = GEN12_GUNIT_SPI_BASE + pdev->resource[0].start; spi->bar.end = spi->bar.start + GEN12_GUNIT_SPI_SIZE - 1; -- 2.34.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2024-03-28 12:26 UTC|newest] Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-03-28 12:22 [PATCH 00/13] spi: add driver for Intel discrete graphics Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 01/13] spi: add auxiliary device for intel dg spi Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-29 12:46 ` Krzysztof Kozlowski 2024-04-11 13:43 ` Usyskin, Alexander 2024-04-11 13:43 ` Usyskin, Alexander 2024-04-11 13:51 ` Krzysztof Kozlowski 2024-03-28 12:22 ` [PATCH 02/13] drm/i915/spi: add spi device for discrete graphics Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 03/13] drm/i915/spi: add intel_spi_region map Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin [this message] 2024-03-28 12:22 ` [PATCH 04/13] drm/i915/spi: add support for access mode Alexander Usyskin 2024-03-28 12:22 ` [PATCH 05/13] spi: add driver for intel graphics on-die spi device Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-29 12:43 ` Krzysztof Kozlowski 2024-04-25 11:58 ` Usyskin, Alexander 2024-04-25 11:58 ` Usyskin, Alexander 2024-03-29 14:11 ` Lucas De Marchi 2024-03-29 14:11 ` Lucas De Marchi 2024-03-28 12:22 ` [PATCH 06/13] spi: intel-dg: implement region enumeration Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 07/13] spi: intel-dg: implement spi access functions Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 08/13] spi: intel-dg: spi register with mtd Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 09/13] spi: intel-dg: implement mtd access handlers Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 10/13] spi: intel-dg: align 64bit read and write Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 11/13] spi: intel-dg: wake card on operations Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-28 12:22 ` [PATCH 12/13] drm/xe/spi: add on-die spi device Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-29 12:46 ` Krzysztof Kozlowski 2024-03-28 12:22 ` [PATCH 13/13] drm/xe/spi: add support for access mode Alexander Usyskin 2024-03-28 12:22 ` Alexander Usyskin 2024-03-29 1:15 ` ✗ Fi.CI.BUILD: failure for spi: add driver for Intel discrete graphics Patchwork
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20240328122236.1718111-5-alexander.usyskin@intel.com \ --to=alexander.usyskin@intel.com \ --cc=intel-gfx@lists.freedesktop.org \ --cc=jani.nikula@linux.intel.com \ --cc=joonas.lahtinen@linux.intel.com \ --cc=linux-mtd@lists.infradead.org \ --cc=miquel.raynal@bootlin.com \ --cc=richard@nod.at \ --cc=rodrigo.vivi@intel.com \ --cc=vigneshr@ti.com \ --cc=vitaly.lubart@intel.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.