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From: Deepak Gupta <debug@rivosinc.com>
To: paul.walmsley@sifive.com, rick.p.edgecombe@intel.com,
	broonie@kernel.org, Szabolcs.Nagy@arm.com, kito.cheng@sifive.com,
	keescook@chromium.org, ajones@ventanamicro.com,
	conor.dooley@microchip.com, cleger@rivosinc.com,
	atishp@atishpatra.org, alex@ghiti.fr, bjorn@rivosinc.com,
	alexghiti@rivosinc.com, samuel.holland@sifive.com,
	palmer@sifive.com, conor@kernel.org, linux-doc@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-mm@kvack.org,
	linux-arch@vger.kernel.org, linux-kselftest@vger.kernel.org
Cc: corbet@lwn.net, tech-j-ext@lists.risc-v.org, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, oleg@redhat.com,
	akpm@linux-foundation.org, arnd@arndb.de, ebiederm@xmission.com,
	Liam.Howlett@oracle.com, vbabka@suse.cz, lstoakes@gmail.com,
	shuah@kernel.org, brauner@kernel.org, debug@rivosinc.com,
	andy.chiu@sifive.com, jerry.shih@sifive.com,
	hankuan.chen@sifive.com, greentime.hu@sifive.com,
	evan@rivosinc.com, xiao.w.wang@intel.com, charlie@rivosinc.com,
	apatel@ventanamicro.com, mchitale@ventanamicro.com,
	dbarboza@ventanamicro.com, sameo@rivosinc.com,
	shikemeng@huaweicloud.com, willy@infradead.org,
	vincent.chen@sifive.com, guoren@kernel.org,
	samitolvanen@google.com, songshuaishuai@tinylab.org,
	gerg@kernel.org, heiko@sntech.de, bhe@redhat.com,
	jeeheng.sia@starfivetech.com, cyy@cyyself.name,
	maskray@google.com, ancientmodern4@gmail.com,
	mathis.salmen@matsal.de, cuiyunhui@bytedance.com,
	bgray@linux.ibm.com, mpe@ellerman.id.au, baruch@tkos.co.il,
	alx@kernel.org, david@redhat.com, catalin.marinas@arm.com,
	revest@chromium.org, josh@joshtriplett.org, shr@devkernel.io,
	deller@gmx.de, omosnace@redhat.com, ojeda@kernel.org,
	jhubbard@nvidia.com
Subject: [PATCH v2 01/27] riscv: envcfg save and restore on task switching
Date: Thu, 28 Mar 2024 21:44:33 -0700	[thread overview]
Message-ID: <20240329044459.3990638-2-debug@rivosinc.com> (raw)
In-Reply-To: <20240329044459.3990638-1-debug@rivosinc.com>

envcfg CSR defines enabling bits for cache management instructions and soon
will control enabling for control flow integrity and pointer masking features.

Control flow integrity enabling for forward cfi and backward cfi is controlled
via envcfg and thus need to be enabled on per thread basis.

This patch creates a place holder for envcfg CSR in `thread_info` and adds
logic to save and restore on task switching.

Signed-off-by: Deepak Gupta <debug@rivosinc.com>
---
 arch/riscv/include/asm/switch_to.h   | 10 ++++++++++
 arch/riscv/include/asm/thread_info.h |  1 +
 2 files changed, 11 insertions(+)

diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h
index 7efdb0584d47..2d9a00a30394 100644
--- a/arch/riscv/include/asm/switch_to.h
+++ b/arch/riscv/include/asm/switch_to.h
@@ -69,6 +69,15 @@ static __always_inline bool has_fpu(void) { return false; }
 #define __switch_to_fpu(__prev, __next) do { } while (0)
 #endif
 
+static inline void __switch_to_envcfg(struct task_struct *next)
+{
+	register unsigned long envcfg = next->thread_info.envcfg;
+
+	asm volatile (ALTERNATIVE("nop", "csrw " __stringify(CSR_ENVCFG) ", %0", 0,
+							  RISCV_ISA_EXT_XLINUXENVCFG, 1)
+							  :: "r" (envcfg) : "memory");
+}
+
 extern struct task_struct *__switch_to(struct task_struct *,
 				       struct task_struct *);
 
@@ -80,6 +89,7 @@ do {							\
 		__switch_to_fpu(__prev, __next);	\
 	if (has_vector())					\
 		__switch_to_vector(__prev, __next);	\
+	__switch_to_envcfg(__next);				\
 	((last) = __switch_to(__prev, __next));		\
 } while (0)
 
diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h
index 5d473343634b..a503bdc2f6dd 100644
--- a/arch/riscv/include/asm/thread_info.h
+++ b/arch/riscv/include/asm/thread_info.h
@@ -56,6 +56,7 @@ struct thread_info {
 	long			user_sp;	/* User stack pointer */
 	int			cpu;
 	unsigned long		syscall_work;	/* SYSCALL_WORK_ flags */
+	unsigned long envcfg;
 #ifdef CONFIG_SHADOW_CALL_STACK
 	void			*scs_base;
 	void			*scs_sp;
-- 
2.43.2


WARNING: multiple messages have this Message-ID (diff)
From: Deepak Gupta <debug@rivosinc.com>
To: paul.walmsley@sifive.com, rick.p.edgecombe@intel.com,
	broonie@kernel.org, Szabolcs.Nagy@arm.com, kito.cheng@sifive.com,
	keescook@chromium.org, ajones@ventanamicro.com,
	conor.dooley@microchip.com, cleger@rivosinc.com,
	atishp@atishpatra.org, alex@ghiti.fr, bjorn@rivosinc.com,
	alexghiti@rivosinc.com, samuel.holland@sifive.com,
	palmer@sifive.com, conor@kernel.org, linux-doc@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-mm@kvack.org,
	linux-arch@vger.kernel.org, linux-kselftest@vger.kernel.org
Cc: corbet@lwn.net, tech-j-ext@lists.risc-v.org, palmer@dabbelt.com,
	aou@eecs.berkeley.edu, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, oleg@redhat.com,
	akpm@linux-foundation.org, arnd@arndb.de, ebiederm@xmission.com,
	Liam.Howlett@oracle.com, vbabka@suse.cz, lstoakes@gmail.com,
	shuah@kernel.org, brauner@kernel.org, debug@rivosinc.com,
	andy.chiu@sifive.com, jerry.shih@sifive.com,
	hankuan.chen@sifive.com, greentime.hu@sifive.com,
	evan@rivosinc.com, xiao.w.wang@intel.com, charlie@rivosinc.com,
	apatel@ventanamicro.com, mchitale@ventanamicro.com,
	dbarboza@ventanamicro.com, sameo@rivosinc.com,
	shikemeng@huaweicloud.com, willy@infradead.org,
	vincent.chen@sifive.com, guoren@kernel.org,
	samitolvanen@google.com, songshuaishuai@tinylab.org,
	gerg@kernel.org, heiko@sntech.de, bhe@redhat.com,
	jeeheng.sia@starfivetech.com, cyy@cyyself.name,
	maskray@google.com, ancientmodern4@gmail.com,
	mathis.salmen@matsal.de, cuiyunhui@bytedance.com,
	bgray@linux.ibm.com, mpe@ellerman.id.au, baruch@tkos.co.il,
	alx@kernel.org, david@redhat.com, catalin.marinas@arm.com,
	revest@chromium.org, josh@joshtriplett.org, shr@devkernel.io,
	deller@gmx.de, omosnace@redhat.com, ojeda@kernel.org,
	jhubbard@nvidia.com
Subject: [PATCH v2 01/27] riscv: envcfg save and restore on task switching
Date: Thu, 28 Mar 2024 21:44:33 -0700	[thread overview]
Message-ID: <20240329044459.3990638-2-debug@rivosinc.com> (raw)
In-Reply-To: <20240329044459.3990638-1-debug@rivosinc.com>

envcfg CSR defines enabling bits for cache management instructions and soon
will control enabling for control flow integrity and pointer masking features.

Control flow integrity enabling for forward cfi and backward cfi is controlled
via envcfg and thus need to be enabled on per thread basis.

This patch creates a place holder for envcfg CSR in `thread_info` and adds
logic to save and restore on task switching.

Signed-off-by: Deepak Gupta <debug@rivosinc.com>
---
 arch/riscv/include/asm/switch_to.h   | 10 ++++++++++
 arch/riscv/include/asm/thread_info.h |  1 +
 2 files changed, 11 insertions(+)

diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h
index 7efdb0584d47..2d9a00a30394 100644
--- a/arch/riscv/include/asm/switch_to.h
+++ b/arch/riscv/include/asm/switch_to.h
@@ -69,6 +69,15 @@ static __always_inline bool has_fpu(void) { return false; }
 #define __switch_to_fpu(__prev, __next) do { } while (0)
 #endif
 
+static inline void __switch_to_envcfg(struct task_struct *next)
+{
+	register unsigned long envcfg = next->thread_info.envcfg;
+
+	asm volatile (ALTERNATIVE("nop", "csrw " __stringify(CSR_ENVCFG) ", %0", 0,
+							  RISCV_ISA_EXT_XLINUXENVCFG, 1)
+							  :: "r" (envcfg) : "memory");
+}
+
 extern struct task_struct *__switch_to(struct task_struct *,
 				       struct task_struct *);
 
@@ -80,6 +89,7 @@ do {							\
 		__switch_to_fpu(__prev, __next);	\
 	if (has_vector())					\
 		__switch_to_vector(__prev, __next);	\
+	__switch_to_envcfg(__next);				\
 	((last) = __switch_to(__prev, __next));		\
 } while (0)
 
diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h
index 5d473343634b..a503bdc2f6dd 100644
--- a/arch/riscv/include/asm/thread_info.h
+++ b/arch/riscv/include/asm/thread_info.h
@@ -56,6 +56,7 @@ struct thread_info {
 	long			user_sp;	/* User stack pointer */
 	int			cpu;
 	unsigned long		syscall_work;	/* SYSCALL_WORK_ flags */
+	unsigned long envcfg;
 #ifdef CONFIG_SHADOW_CALL_STACK
 	void			*scs_base;
 	void			*scs_sp;
-- 
2.43.2


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2024-03-29  4:45 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-29  4:44 [PATCH v2 00/27] riscv control-flow integrity for usermode Deepak Gupta
2024-03-29  4:44 ` Deepak Gupta
2024-03-29  4:44 ` Deepak Gupta [this message]
2024-03-29  4:44   ` [PATCH v2 01/27] riscv: envcfg save and restore on task switching Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 02/27] riscv: define default value for envcfg Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 03/27] riscv/Kconfig: enable HAVE_EXIT_THREAD for riscv Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 04/27] riscv: zicfiss/zicfilp enumeration Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  5:08   ` Stefan O'Rear
2024-03-29  5:08     ` Stefan O'Rear
2024-03-29  5:13     ` Deepak Gupta
2024-03-29  5:13       ` Deepak Gupta
2024-03-29  7:24   ` Conor Dooley
2024-03-29  7:24     ` Conor Dooley
2024-03-29  4:44 ` [PATCH v2 05/27] riscv: zicfiss/zicfilp extension csr and bit definitions Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 06/27] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 07/27] mm: Define VM_SHADOW_STACK for RISC-V Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 08/27] mm: abstract shadow stack vma behind `arch_is_shadow_stack` Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 09/27] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 10/27] riscv mm: manufacture shadow stack pte Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 11/27] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  5:15   ` Deepak Gupta
2024-03-29  5:15     ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 12/27] riscv mmu: write protect and shadow stack Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 13/27] riscv/mm: Implement map_shadow_stack() syscall Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 14/27] riscv/shstk: If needed allocate a new shadow stack on clone Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 15/27] prctl: arch-agnostic prctl for shadow stack Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 16/27] prctl: arch-agnostic prtcl for indirect branch tracking Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 17/27] riscv: Implements arch agnostic shadow stack prctls Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 18/27] riscv: Implements arch argnostic indirect branch tracking prctls Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 19/27] riscv/kernel: update __show_regs to print shadow stack register Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 20/27] riscv/traps: Introduce software check exception Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 21/27] riscv sigcontext: adding cfi state field in sigcontext Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 22/27] riscv signal: Save and restore of shadow stack for signal Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 23/27] riscv/ptrace: riscv cfi status and state via ptrace and in core files Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 24/27] riscv: create a config for shadow stack and landing pad instr support Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 25/27] riscv: Documentation for landing pad / indirect branch tracking Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 26/27] riscv: Documentation for shadow stack on riscv Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29  4:44 ` [PATCH v2 27/27] kselftest/riscv: kselftest for user mode cfi Deepak Gupta
2024-03-29  4:44   ` Deepak Gupta
2024-03-29 19:50   ` Muhammad Usama Anjum
2024-03-29 19:50     ` Muhammad Usama Anjum
2024-03-29 20:02     ` Deepak Gupta
2024-03-29 20:02       ` Deepak Gupta
2024-04-01  9:46       ` Muhammad Usama Anjum
2024-04-01  9:46         ` Muhammad Usama Anjum
2024-04-01 17:34         ` Deepak Gupta
2024-04-01 17:34           ` Deepak Gupta
2024-04-01 17:55           ` Deepak Gupta
2024-04-01 17:55             ` Deepak Gupta

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