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From: Nicolas Pitre <nico@fluxnic.net>
To: Daniel Lezcano <daniel.lezcano@linaro.org>,
	linux-pm@vger.kernel.org, linux-mediatek@lists.infradead.org,
	devicetree@vger.kernel.org
Cc: Nicolas Pitre <npitre@baylibre.com>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>
Subject: [PATCH v2 04/15] thermal/drivers/mediatek/lvts_thermal: use offsets for every calibration byte
Date: Mon,  1 Apr 2024 23:25:38 -0400	[thread overview]
Message-ID: <20240402032729.2736685-5-nico@fluxnic.net> (raw)
In-Reply-To: <20240402032729.2736685-1-nico@fluxnic.net>

From: Nicolas Pitre <npitre@baylibre.com>

Current code assumes calibration values are always stored contiguously
in host endian order. A future patch will prove this wrong.

Let's specify the offset for each calibration byte instead.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
---
 drivers/thermal/mediatek/lvts_thermal.c | 164 ++++++++++++++----------
 1 file changed, 99 insertions(+), 65 deletions(-)

diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c
index 00994a442b..6edb858acf 100644
--- a/drivers/thermal/mediatek/lvts_thermal.c
+++ b/drivers/thermal/mediatek/lvts_thermal.c
@@ -100,6 +100,7 @@ static int golden_temp_offset;
 
 struct lvts_sensor_data {
 	int dt_id;
+	u8 cal_offsets[3];
 };
 
 struct lvts_ctrl_data {
@@ -665,8 +666,9 @@ static int lvts_sensor_init(struct device *dev, struct lvts_ctrl *lvts_ctrl,
  * <-----ap--tc#3-----> <-----sensor#7-----> <-----sensor#8----->
  *  0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47 | 0x48
  *
- * The data description gives the offset of the calibration data in
- * this bytes stream for each sensor.
+ * Note: In some cases, values don't strictly follow a little endian ordering.
+ * The data description gives byte offsets constituting each calibration value
+ * for each sensor.
  */
 static int lvts_calibration_init(struct device *dev, struct lvts_ctrl *lvts_ctrl,
 					const struct lvts_ctrl_data *lvts_ctrl_data,
@@ -674,9 +676,15 @@ static int lvts_calibration_init(struct device *dev, struct lvts_ctrl *lvts_ctrl
 {
 	int i;
 
-	for (i = 0; i < lvts_ctrl_data->num_lvts_sensor; i++)
-		memcpy(&lvts_ctrl->calibration[i],
-		       efuse_calibration + lvts_ctrl_data->cal_offset[i], 3);
+	for (i = 0; i < lvts_ctrl_data->num_lvts_sensor; i++) {
+		const struct lvts_sensor_data *sensor =
+					&lvts_ctrl_data->lvts_sensor[i];
+
+		lvts_ctrl->calibration[i] =
+			(efuse_calibration[sensor->cal_offsets[0]] << 0) +
+			(efuse_calibration[sensor->cal_offsets[1]] << 8) +
+			(efuse_calibration[sensor->cal_offsets[2]] << 16);
+	}
 
 	return 0;
 }
@@ -1297,23 +1305,29 @@ static void lvts_remove(struct platform_device *pdev)
 
 static const struct lvts_ctrl_data mt7988_lvts_ap_data_ctrl[] = {
 	{
-		.cal_offset = { 0x00, 0x04, 0x08, 0x0c },
 		.lvts_sensor = {
-			{ .dt_id = MT7988_CPU_0 },
-			{ .dt_id = MT7988_CPU_1 },
-			{ .dt_id = MT7988_ETH2P5G_0 },
-			{ .dt_id = MT7988_ETH2P5G_1 }
+			{ .dt_id = MT7988_CPU_0,
+			  .cal_offsets = { 0x00, 0x01, 0x02 } },
+			{ .dt_id = MT7988_CPU_1,
+			  .cal_offsets = { 0x04, 0x05, 0x06 } },
+			{ .dt_id = MT7988_ETH2P5G_0,
+			  .cal_offsets = { 0x08, 0x09, 0x0a } },
+			{ .dt_id = MT7988_ETH2P5G_1,
+			  .cal_offsets = { 0x0c, 0x0d, 0x0e } }
 		},
 		.num_lvts_sensor = 4,
 		.offset = 0x0,
 	},
 	{
-		.cal_offset = { 0x14, 0x18, 0x1c, 0x20 },
 		.lvts_sensor = {
-			{ .dt_id = MT7988_TOPS_0},
-			{ .dt_id = MT7988_TOPS_1},
-			{ .dt_id = MT7988_ETHWARP_0},
-			{ .dt_id = MT7988_ETHWARP_1}
+			{ .dt_id = MT7988_TOPS_0,
+			   .cal_offsets = { 0x14, 0x15, 0x16 } },
+			{ .dt_id = MT7988_TOPS_1,
+			   .cal_offsets = { 0x18, 0x19, 0x1a } },
+			{ .dt_id = MT7988_ETHWARP_0,
+			   .cal_offsets = { 0x1c, 0x1d, 0x1e } },
+			{ .dt_id = MT7988_ETHWARP_1,
+			   .cal_offsets = { 0x20, 0x21, 0x22 } }
 		},
 		.num_lvts_sensor = 4,
 		.offset = 0x100,
@@ -1354,32 +1368,37 @@ static int lvts_resume(struct device *dev)
 
 static const struct lvts_ctrl_data mt8192_lvts_mcu_data_ctrl[] = {
 	{
-		.cal_offset = { 0x04, 0x08 },
 		.lvts_sensor = {
-			{ .dt_id = MT8192_MCU_BIG_CPU0 },
-			{ .dt_id = MT8192_MCU_BIG_CPU1 }
+			{ .dt_id = MT8192_MCU_BIG_CPU0,
+			  .cal_offsets = { 0x04, 0x05, 0x06 } },
+			{ .dt_id = MT8192_MCU_BIG_CPU1,
+			  .cal_offsets = { 0x08, 0x09, 0x0a } }
 		},
 		.num_lvts_sensor = 2,
 		.offset = 0x0,
 		.mode = LVTS_MSR_FILTERED_MODE,
 	},
 	{
-		.cal_offset = { 0x0c, 0x10 },
 		.lvts_sensor = {
-			{ .dt_id = MT8192_MCU_BIG_CPU2 },
-			{ .dt_id = MT8192_MCU_BIG_CPU3 }
+			{ .dt_id = MT8192_MCU_BIG_CPU2,
+			  .cal_offsets = { 0x0c, 0x0d, 0x0e } },
+			{ .dt_id = MT8192_MCU_BIG_CPU3,
+			  .cal_offsets = { 0x10, 0x11, 0x12 } }
 		},
 		.num_lvts_sensor = 2,
 		.offset = 0x100,
 		.mode = LVTS_MSR_FILTERED_MODE,
 	},
 	{
-		.cal_offset = { 0x14, 0x18, 0x1c, 0x20 },
 		.lvts_sensor = {
-			{ .dt_id = MT8192_MCU_LITTLE_CPU0 },
-			{ .dt_id = MT8192_MCU_LITTLE_CPU1 },
-			{ .dt_id = MT8192_MCU_LITTLE_CPU2 },
-			{ .dt_id = MT8192_MCU_LITTLE_CPU3 }
+			{ .dt_id = MT8192_MCU_LITTLE_CPU0,
+			  .cal_offsets = { 0x14, 0x15, 0x16 } },
+			{ .dt_id = MT8192_MCU_LITTLE_CPU1,
+			  .cal_offsets = { 0x18, 0x19, 0x1a } },
+			{ .dt_id = MT8192_MCU_LITTLE_CPU2,
+			  .cal_offsets = { 0x1c, 0x1d, 0x1e } },
+			{ .dt_id = MT8192_MCU_LITTLE_CPU3,
+			  .cal_offsets = { 0x20, 0x21, 0x22 } }
 		},
 		.num_lvts_sensor = 4,
 		.offset = 0x200,
@@ -1388,39 +1407,44 @@ static const struct lvts_ctrl_data mt8192_lvts_mcu_data_ctrl[] = {
 };
 
 static const struct lvts_ctrl_data mt8192_lvts_ap_data_ctrl[] = {
-		{
-		.cal_offset = { 0x24, 0x28 },
+	{
 		.lvts_sensor = {
-			{ .dt_id = MT8192_AP_VPU0 },
-			{ .dt_id = MT8192_AP_VPU1 }
+			{ .dt_id = MT8192_AP_VPU0,
+			  .cal_offsets = { 0x24, 0x25, 0x26 } },
+			{ .dt_id = MT8192_AP_VPU1,
+			  .cal_offsets = { 0x28, 0x29, 0x2a } }
 		},
 		.num_lvts_sensor = 2,
 		.offset = 0x0,
 	},
 	{
-		.cal_offset = { 0x2c, 0x30 },
 		.lvts_sensor = {
-			{ .dt_id = MT8192_AP_GPU0 },
-			{ .dt_id = MT8192_AP_GPU1 }
+			{ .dt_id = MT8192_AP_GPU0,
+			  .cal_offsets = { 0x2c, 0x2d, 0x2e } },
+			{ .dt_id = MT8192_AP_GPU1,
+			  .cal_offsets = { 0x30, 0x31, 0x32 } }
 		},
 		.num_lvts_sensor = 2,
 		.offset = 0x100,
 	},
 	{
-		.cal_offset = { 0x34, 0x38 },
 		.lvts_sensor = {
-			{ .dt_id = MT8192_AP_INFRA },
-			{ .dt_id = MT8192_AP_CAM },
+			{ .dt_id = MT8192_AP_INFRA,
+			  .cal_offsets = { 0x34, 0x35, 0x36 } },
+			{ .dt_id = MT8192_AP_CAM,
+			  .cal_offsets = { 0x38, 0x39, 0x3a } },
 		},
 		.num_lvts_sensor = 2,
 		.offset = 0x200,
 	},
 	{
-		.cal_offset = { 0x3c, 0x40, 0x44 },
 		.lvts_sensor = {
-			{ .dt_id = MT8192_AP_MD0 },
-			{ .dt_id = MT8192_AP_MD1 },
-			{ .dt_id = MT8192_AP_MD2 }
+			{ .dt_id = MT8192_AP_MD0,
+			  .cal_offsets = { 0x3c, 0x3d, 0x3e } },
+			{ .dt_id = MT8192_AP_MD1,
+			  .cal_offsets = { 0x40, 0x41, 0x42 } },
+			{ .dt_id = MT8192_AP_MD2,
+			  .cal_offsets = { 0x44, 0x45, 0x46 } }
 		},
 		.num_lvts_sensor = 3,
 		.offset = 0x300,
@@ -1429,30 +1453,35 @@ static const struct lvts_ctrl_data mt8192_lvts_ap_data_ctrl[] = {
 
 static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = {
 	{
-		.cal_offset = { 0x04, 0x07 },
 		.lvts_sensor = {
-			{ .dt_id = MT8195_MCU_BIG_CPU0 },
-			{ .dt_id = MT8195_MCU_BIG_CPU1 }
+			{ .dt_id = MT8195_MCU_BIG_CPU0,
+			  .cal_offsets = { 0x04, 0x05, 0x06 } },
+			{ .dt_id = MT8195_MCU_BIG_CPU1,
+			  .cal_offsets = { 0x07, 0x08, 0x09 } }
 		},
 		.num_lvts_sensor = 2,
 		.offset = 0x0,
 	},
 	{
-		.cal_offset = { 0x0d, 0x10 },
 		.lvts_sensor = {
-			{ .dt_id = MT8195_MCU_BIG_CPU2 },
-			{ .dt_id = MT8195_MCU_BIG_CPU3 }
+			{ .dt_id = MT8195_MCU_BIG_CPU2,
+			  .cal_offsets = { 0x0d, 0x0e, 0x0f } },
+			{ .dt_id = MT8195_MCU_BIG_CPU3,
+			  .cal_offsets = { 0x10, 0x11, 0x12 } }
 		},
 		.num_lvts_sensor = 2,
 		.offset = 0x100,
 	},
 	{
-		.cal_offset = { 0x16, 0x19, 0x1c, 0x1f },
 		.lvts_sensor = {
-			{ .dt_id = MT8195_MCU_LITTLE_CPU0 },
-			{ .dt_id = MT8195_MCU_LITTLE_CPU1 },
-			{ .dt_id = MT8195_MCU_LITTLE_CPU2 },
-			{ .dt_id = MT8195_MCU_LITTLE_CPU3 }
+			{ .dt_id = MT8195_MCU_LITTLE_CPU0,
+			  .cal_offsets = { 0x16, 0x17, 0x18 } },
+			{ .dt_id = MT8195_MCU_LITTLE_CPU1,
+			  .cal_offsets = { 0x19, 0x1a, 0x1b } },
+			{ .dt_id = MT8195_MCU_LITTLE_CPU2,
+			  .cal_offsets = { 0x1c, 0x1d, 0x1e } },
+			{ .dt_id = MT8195_MCU_LITTLE_CPU3,
+			  .cal_offsets = { 0x1f, 0x20, 0x21 } }
 		},
 		.num_lvts_sensor = 4,
 		.offset = 0x200,
@@ -1460,39 +1489,44 @@ static const struct lvts_ctrl_data mt8195_lvts_mcu_data_ctrl[] = {
 };
 
 static const struct lvts_ctrl_data mt8195_lvts_ap_data_ctrl[] = {
-		{
-		.cal_offset = { 0x25, 0x28 },
+	{
 		.lvts_sensor = {
-			{ .dt_id = MT8195_AP_VPU0 },
-			{ .dt_id = MT8195_AP_VPU1 }
+			{ .dt_id = MT8195_AP_VPU0,
+			  .cal_offsets = { 0x25, 0x26, 0x27 } },
+			{ .dt_id = MT8195_AP_VPU1,
+			  .cal_offsets = { 0x28, 0x29, 0x2a } }
 		},
 		.num_lvts_sensor = 2,
 		.offset = 0x0,
 	},
 	{
-		.cal_offset = { 0x2e, 0x31 },
 		.lvts_sensor = {
-			{ .dt_id = MT8195_AP_GPU0 },
-			{ .dt_id = MT8195_AP_GPU1 }
+			{ .dt_id = MT8195_AP_GPU0,
+			  .cal_offsets = { 0x2e, 0x2f, 0x30 } },
+			{ .dt_id = MT8195_AP_GPU1,
+			  .cal_offsets = { 0x31, 0x32, 0x33 } }
 		},
 		.num_lvts_sensor = 2,
 		.offset = 0x100,
 	},
 	{
-		.cal_offset = { 0x37, 0x3a, 0x3d },
 		.lvts_sensor = {
-			{ .dt_id = MT8195_AP_VDEC },
-			{ .dt_id = MT8195_AP_IMG },
-			{ .dt_id = MT8195_AP_INFRA },
+			{ .dt_id = MT8195_AP_VDEC,
+			  .cal_offsets = { 0x37, 0x38, 0x39 } },
+			{ .dt_id = MT8195_AP_IMG,
+			  .cal_offsets = { 0x3a, 0x3b, 0x3c } },
+			{ .dt_id = MT8195_AP_INFRA,
+			  .cal_offsets = { 0x3d, 0x3e, 0x3f } }
 		},
 		.num_lvts_sensor = 3,
 		.offset = 0x200,
 	},
 	{
-		.cal_offset = { 0x43, 0x46 },
 		.lvts_sensor = {
-			{ .dt_id = MT8195_AP_CAM0 },
-			{ .dt_id = MT8195_AP_CAM1 }
+			{ .dt_id = MT8195_AP_CAM0,
+			  .cal_offsets = { 0x43, 0x44, 0x45 } },
+			{ .dt_id = MT8195_AP_CAM1,
+			  .cal_offsets = { 0x46, 0x47, 0x48 } }
 		},
 		.num_lvts_sensor = 2,
 		.offset = 0x300,
-- 
2.44.0


  parent reply	other threads:[~2024-04-02  3:27 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-02  3:25 [PATCH v3 00/15] Mediatek thermal sensor driver support for MT8186 and MT8188 Nicolas Pitre
2024-04-02  3:25 ` [PATCH v2 01/15] thermal/drivers/mediatek/lvts_thermal: retrieve all calibration bytes Nicolas Pitre
2024-05-14 10:18   ` [thermal: thermal/fixes] thermal/drivers/mediatek/lvts_thermal: Retrieve " thermal-bot for Nicolas Pitre
2024-04-02  3:25 ` [PATCH v2 02/15] thermal/drivers/mediatek/lvts_thermal: move comment Nicolas Pitre
2024-05-14 10:18   ` [thermal: thermal/fixes] thermal/drivers/mediatek/lvts_thermal: Move comment thermal-bot for Nicolas Pitre
2024-04-02  3:25 ` [PATCH v2 03/15] thermal/drivers/mediatek/lvts_thermal: remove .hw_tshut_temp Nicolas Pitre
2024-05-14 10:18   ` [thermal: thermal/fixes] thermal/drivers/mediatek/lvts_thermal: Remove .hw_tshut_temp thermal-bot for Nicolas Pitre
2024-04-02  3:25 ` Nicolas Pitre [this message]
2024-05-14 10:18   ` [thermal: thermal/fixes] thermal/drivers/mediatek/lvts_thermal: Use offsets for every calibration byte thermal-bot for Nicolas Pitre
2024-04-02  3:25 ` [PATCH v2 05/15] thermal/drivers/mediatek/lvts_thermal: guard against efuse data buffer overflow Nicolas Pitre
2024-05-14 10:18   ` [thermal: thermal/fixes] thermal/drivers/mediatek/lvts_thermal: Guard " thermal-bot for Nicolas Pitre
2024-04-02  3:25 ` [PATCH v2 06/15] dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for MT8186 Nicolas Pitre
2024-04-02  6:44   ` Krzysztof Kozlowski
2024-05-14 10:18   ` [thermal: thermal/fixes] " thermal-bot for Nicolas Pitre
2024-04-02  3:25 ` [PATCH v2 07/15] arm64: dts: mediatek: mt8186: add lvts definitions Nicolas Pitre
2024-04-02  3:25 ` [PATCH v2 08/15] thermal/drivers/mediatek/lvts_thermal: add MT8186 support Nicolas Pitre
2024-05-14 10:18   ` [thermal: thermal/fixes] thermal/drivers/mediatek/lvts_thermal: Add " thermal-bot for Nicolas Pitre
2024-04-02  3:25 ` [PATCH v2 09/15] arm64: dts: mediatek: mt8186: add default thermal zones Nicolas Pitre
2024-04-02  3:25 ` [PATCH v2 10/15] thermal/drivers/mediatek/lvts_thermal: provision for gt variable location Nicolas Pitre
2024-05-14 10:18   ` [thermal: thermal/fixes] thermal/drivers/mediatek/lvts_thermal: Provision " thermal-bot for Nicolas Pitre
2024-04-02  3:25 ` [PATCH v2 11/15] thermal/drivers/mediatek/lvts_thermal: allow early empty sensor slots Nicolas Pitre
2024-05-14 10:18   ` [thermal: thermal/fixes] thermal/drivers/mediatek/lvts_thermal: Allow " thermal-bot for Nicolas Pitre
2024-04-02  3:25 ` [PATCH v2 12/15] dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for MT8188 Nicolas Pitre
2024-04-02 16:23   ` Rob Herring
2024-05-14 10:18   ` [thermal: thermal/fixes] " thermal-bot for Nicolas Pitre
2024-04-02  3:25 ` [PATCH v2 13/15] arm64: dts: mediatek: mt8188: add lvts definitions Nicolas Pitre
2024-04-02  3:25 ` [PATCH v2 14/15] thermal/drivers/mediatek/lvts_thermal: add MT8188 support Nicolas Pitre
2024-05-14 10:18   ` [thermal: thermal/fixes] thermal/drivers/mediatek/lvts_thermal: Add " thermal-bot for Nicolas Pitre
2024-04-02  3:25 ` [PATCH v2 15/15] arm64: dts: mediatek: mt8188: add default thermal zones Nicolas Pitre
2024-04-04 15:16   ` Daniel Lezcano
2024-04-02  3:31 ` [PATCH v3 00/15] Mediatek thermal sensor driver support for MT8186 and MT8188 Nicolas Pitre
2024-04-23  9:06 ` Daniel Lezcano
2024-04-23  9:22 ` AngeloGioacchino Del Regno

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