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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: Helge Konetzka <hk@zapateado.de>
Subject: [PATCH for-9.1 5/4] vga: optimize computation of dirty memory region
Date: Tue,  2 Apr 2024 13:34:07 +0200	[thread overview]
Message-ID: <20240402113408.18048-6-pbonzini@redhat.com> (raw)
In-Reply-To: <20240402113408.18048-1-pbonzini@redhat.com>

The depth == 0 and depth == 15 have to be special cased because
width * depth / 8 does not provide the correct scanline length.
However, thanks to the recent reorganization of vga_draw_graphic()
the correct value of VRAM bits per pixel is available in "bits".

Use it (via the same "bwidth" computation that is used later in
the function, and that already takes into account pel panning),
so that the slow path is restricted to the wraparound case.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 hw/display/vga.c | 24 +++++++-----------------
 1 file changed, 7 insertions(+), 17 deletions(-)

diff --git a/hw/display/vga.c b/hw/display/vga.c
index 77f59e8c113..77d709a3d69 100644
--- a/hw/display/vga.c
+++ b/hw/display/vga.c
@@ -1574,22 +1574,16 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
 
     /* Horizontal pel panning bit 3 is only used in text mode.  */
     hpel = bits <= 8 ? s->params.hpel & 7 : 0;
+    bwidth = DIV_ROUND_UP(width * bits, 8); /* scanline length */
+    if (hpel) {
+        bwidth += 4;
+    }
 
     region_start = (s->params.start_addr * 4);
-    region_end = region_start + (ram_addr_t)s->params.line_offset * height;
-    region_end += width * depth / 8; /* scanline length */
-    region_end -= s->params.line_offset;
-    if (hpel) {
-        region_end += 4;
-    }
-    if (region_end > s->vbe_size || depth == 0 || depth == 15) {
+    region_end = region_start + (ram_addr_t)s->params.line_offset * (height - 1) + bwidth;
+    if (region_end > s->vbe_size) {
         /*
-         * We land here on:
-         *  - wraps around (can happen with cirrus vbe modes)
-         *  - depth == 0 (256 color palette video mode)
-         *  - depth == 15
-         *
-         * Take the safe and slow route:
+         * On wrap around take the safe and slow route:
          *   - create a dirty bitmap snapshot for all vga memory.
          *   - force shadowing (so all vga memory access goes
          *     through vga_read_*() helpers).
@@ -1667,10 +1661,6 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
            s->params.line_compare, sr(s, VGA_SEQ_CLOCK_MODE));
 #endif
     addr1 = (s->params.start_addr * 4);
-    bwidth = DIV_ROUND_UP(width * bits, 8);
-    if (hpel) {
-        bwidth += 4;
-    }
     y_start = -1;
     d = surface_data(surface);
     linesize = surface_stride(surface);
-- 
2.44.0



  parent reply	other threads:[~2024-04-02 11:35 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-02 11:34 [PATCH for-9.0 0/4] vga: fix assertion failure with 4- and 16-color modes Paolo Bonzini
2024-04-02 11:34 ` [PATCH for-9.0 1/4] vga: merge conditionals on shift control register Paolo Bonzini
2024-04-02 11:40   ` Philippe Mathieu-Daudé
2024-04-02 11:34 ` [PATCH for-9.0 2/4] vga: move computation of dirty memory region later Paolo Bonzini
2024-04-02 11:41   ` Philippe Mathieu-Daudé
2024-04-02 11:34 ` [PATCH for-9.0 3/4] vga: adjust dirty memory region if pel panning is active Paolo Bonzini
2024-04-02 11:43   ` Philippe Mathieu-Daudé
2024-04-02 11:34 ` [PATCH for-9.0 4/4] vga: do not treat horiz pel panning value of 8 as "enabled" Paolo Bonzini
2024-04-02 11:34 ` Paolo Bonzini [this message]
2024-04-02 11:34 ` [PATCH for-9.1 6/4] vga: move dirty memory region code together Paolo Bonzini

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