From: Shawn Sung <shawn.sung@mediatek.com> To: CK Hu <ck.hu@mediatek.com>, Jassi Brar <jassisinghbrar@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Matthias Brugger <matthias.bgg@gmail.com>, Hsiao Chien Sung <shawn.sung@mediatek.com>, "Jason-JH . Lin" <jason-jh.lin@mediatek.com>, Houlong Wei <houlong.wei@mediatek.com>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org> Subject: [PATCH v5 09/10] mailbox: mediatek: Add secure CMDQ driver support for CMDQ driver Date: Wed, 3 Apr 2024 18:26:01 +0800 [thread overview] Message-ID: <20240403102602.32155-10-shawn.sung@mediatek.com> (raw) In-Reply-To: <20240403102602.32155-1-shawn.sung@mediatek.com> From: "Jason-JH.Lin" <jason-jh.lin@mediatek.com> CMDQ driver will probe a secure CMDQ driver when has_sec flag in platform data is true and its device node in dts has defined a event id of CMDQ_SYNC_TOKEN_SEC_EOF. Secure CMDQ driver support on mt8188 and mt8195 currently. So add a has_secure flag to their driver data to probe it. Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> --- drivers/mailbox/mtk-cmdq-mailbox.c | 69 +++++++++++++++++++++++++++++- 1 file changed, 68 insertions(+), 1 deletion(-) diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c index e04302ca6ec03..a51140404d116 100644 --- a/drivers/mailbox/mtk-cmdq-mailbox.c +++ b/drivers/mailbox/mtk-cmdq-mailbox.c @@ -15,8 +15,8 @@ #include <linux/pm_runtime.h> #include <linux/mailbox_controller.h> #include <linux/mailbox/mtk-cmdq-mailbox.h> +#include <linux/mailbox/mtk-cmdq-sec-mailbox.h> #include <linux/of.h> - #define CMDQ_MBOX_AUTOSUSPEND_DELAY_MS 100 #define CMDQ_OP_CODE_MASK (0xff << CMDQ_OP_CODE_SHIFT) @@ -55,11 +55,19 @@ #define CMDQ_JUMP_BY_OFFSET 0x10000000 #define CMDQ_JUMP_BY_PA 0x10000001 +#define CMDQ_IS_SECURE_THREAD(idx, cmdq) (cmdq->pdata->has_secure && \ + idx >= cmdq->pdata->secure_thread_min && \ + idx < cmdq->pdata->secure_thread_min + \ + cmdq->pdata->secure_thread_nr) + struct gce_plat { u32 thread_nr; u8 shift; bool control_by_sw; bool sw_ddr_en; + bool has_secure; + u32 secure_thread_nr; + u32 secure_thread_min; u32 gce_num; }; @@ -377,6 +385,13 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data) if (ret < 0) return ret; + if (CMDQ_IS_SECURE_THREAD(thread->idx, cmdq)) { + ret = cmdq_sec_mbox.ops->send_data(chan, data); + pm_runtime_mark_last_busy(cmdq->mbox.dev); + pm_runtime_put_autosuspend(cmdq->mbox.dev); + return ret; + } + task = kzalloc(sizeof(*task), GFP_ATOMIC); if (!task) { pm_runtime_put_autosuspend(cmdq->mbox.dev); @@ -436,6 +451,12 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data) static int cmdq_mbox_startup(struct mbox_chan *chan) { + struct cmdq *cmdq = dev_get_drvdata(chan->mbox->dev); + struct cmdq_thread *thread = (struct cmdq_thread *)chan->con_priv; + + if (CMDQ_IS_SECURE_THREAD(thread->idx, cmdq)) + cmdq_sec_mbox.ops->startup(chan); + return 0; } @@ -448,6 +469,13 @@ static void cmdq_mbox_shutdown(struct mbox_chan *chan) WARN_ON(pm_runtime_get_sync(cmdq->mbox.dev)); + if (CMDQ_IS_SECURE_THREAD(thread->idx, cmdq)) { + cmdq_sec_mbox.ops->shutdown(chan); + pm_runtime_mark_last_busy(cmdq->mbox.dev); + pm_runtime_put_autosuspend(cmdq->mbox.dev); + return; + } + spin_lock_irqsave(&thread->chan->lock, flags); if (list_empty(&thread->task_busy_list)) goto done; @@ -494,6 +522,13 @@ static int cmdq_mbox_flush(struct mbox_chan *chan, unsigned long timeout) if (ret < 0) return ret; + if (CMDQ_IS_SECURE_THREAD(thread->idx, cmdq)) { + cmdq_sec_mbox.ops->flush(chan, timeout); + pm_runtime_mark_last_busy(cmdq->mbox.dev); + pm_runtime_put_autosuspend(cmdq->mbox.dev); + return 0; + } + spin_lock_irqsave(&thread->chan->lock, flags); if (list_empty(&thread->task_busy_list)) goto out; @@ -569,6 +604,7 @@ static int cmdq_probe(struct platform_device *pdev) int alias_id = 0; static const char * const clk_name = "gce"; static const char * const clk_names[] = { "gce0", "gce1" }; + u32 hwid = 0; cmdq = devm_kzalloc(dev, sizeof(*cmdq), GFP_KERNEL); if (!cmdq) @@ -594,6 +630,8 @@ static int cmdq_probe(struct platform_device *pdev) dev, cmdq->base, cmdq->irq); if (cmdq->pdata->gce_num > 1) { + hwid = of_alias_get_id(dev->of_node, clk_name); + for_each_child_of_node(phandle->parent, node) { alias_id = of_alias_get_id(node, clk_name); if (alias_id >= 0 && alias_id < cmdq->pdata->gce_num) { @@ -643,6 +681,29 @@ static int cmdq_probe(struct platform_device *pdev) cmdq->mbox.chans[i].con_priv = (void *)&cmdq->thread[i]; } + if (cmdq->pdata->has_secure) { + struct platform_device *cmdq_sec; + static struct gce_sec_plat sec_plat = {0}; + + if (of_property_read_u32_index(dev->of_node, "mediatek,gce-events", 0, + &sec_plat.cmdq_event) == 0) { + sec_plat.mbox = &cmdq->mbox; + sec_plat.base = cmdq->base; + sec_plat.hwid = hwid; + sec_plat.secure_thread_nr = cmdq->pdata->secure_thread_nr; + sec_plat.secure_thread_min = cmdq->pdata->secure_thread_min; + + cmdq_sec = platform_device_register_data(dev, "mtk-cmdq-sec", + PLATFORM_DEVID_AUTO, + &sec_plat, + sizeof(sec_plat)); + if (IS_ERR(cmdq_sec)) { + dev_err(dev, "failed to register platform_device mtk-cmdq-sec\n"); + return PTR_ERR(cmdq_sec); + } + } + } + err = devm_mbox_controller_register(dev, &cmdq->mbox); if (err < 0) { dev_err(dev, "failed to register mailbox: %d\n", err); @@ -719,6 +780,9 @@ static const struct gce_plat gce_plat_mt8188 = { .thread_nr = 32, .shift = 3, .control_by_sw = true, + .has_secure = true, + .secure_thread_nr = 2, + .secure_thread_min = 8, .gce_num = 2 }; @@ -733,6 +797,9 @@ static const struct gce_plat gce_plat_mt8195 = { .thread_nr = 24, .shift = 3, .control_by_sw = true, + .has_secure = true, + .secure_thread_nr = 2, + .secure_thread_min = 8, .gce_num = 2 }; -- 2.18.0
WARNING: multiple messages have this Message-ID (diff)
From: Shawn Sung <shawn.sung@mediatek.com> To: CK Hu <ck.hu@mediatek.com>, Jassi Brar <jassisinghbrar@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Matthias Brugger <matthias.bgg@gmail.com>, Hsiao Chien Sung <shawn.sung@mediatek.com>, "Jason-JH . Lin" <jason-jh.lin@mediatek.com>, Houlong Wei <houlong.wei@mediatek.com>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org> Subject: [PATCH v5 09/10] mailbox: mediatek: Add secure CMDQ driver support for CMDQ driver Date: Wed, 3 Apr 2024 18:26:01 +0800 [thread overview] Message-ID: <20240403102602.32155-10-shawn.sung@mediatek.com> (raw) In-Reply-To: <20240403102602.32155-1-shawn.sung@mediatek.com> From: "Jason-JH.Lin" <jason-jh.lin@mediatek.com> CMDQ driver will probe a secure CMDQ driver when has_sec flag in platform data is true and its device node in dts has defined a event id of CMDQ_SYNC_TOKEN_SEC_EOF. Secure CMDQ driver support on mt8188 and mt8195 currently. So add a has_secure flag to their driver data to probe it. Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> --- drivers/mailbox/mtk-cmdq-mailbox.c | 69 +++++++++++++++++++++++++++++- 1 file changed, 68 insertions(+), 1 deletion(-) diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c index e04302ca6ec03..a51140404d116 100644 --- a/drivers/mailbox/mtk-cmdq-mailbox.c +++ b/drivers/mailbox/mtk-cmdq-mailbox.c @@ -15,8 +15,8 @@ #include <linux/pm_runtime.h> #include <linux/mailbox_controller.h> #include <linux/mailbox/mtk-cmdq-mailbox.h> +#include <linux/mailbox/mtk-cmdq-sec-mailbox.h> #include <linux/of.h> - #define CMDQ_MBOX_AUTOSUSPEND_DELAY_MS 100 #define CMDQ_OP_CODE_MASK (0xff << CMDQ_OP_CODE_SHIFT) @@ -55,11 +55,19 @@ #define CMDQ_JUMP_BY_OFFSET 0x10000000 #define CMDQ_JUMP_BY_PA 0x10000001 +#define CMDQ_IS_SECURE_THREAD(idx, cmdq) (cmdq->pdata->has_secure && \ + idx >= cmdq->pdata->secure_thread_min && \ + idx < cmdq->pdata->secure_thread_min + \ + cmdq->pdata->secure_thread_nr) + struct gce_plat { u32 thread_nr; u8 shift; bool control_by_sw; bool sw_ddr_en; + bool has_secure; + u32 secure_thread_nr; + u32 secure_thread_min; u32 gce_num; }; @@ -377,6 +385,13 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data) if (ret < 0) return ret; + if (CMDQ_IS_SECURE_THREAD(thread->idx, cmdq)) { + ret = cmdq_sec_mbox.ops->send_data(chan, data); + pm_runtime_mark_last_busy(cmdq->mbox.dev); + pm_runtime_put_autosuspend(cmdq->mbox.dev); + return ret; + } + task = kzalloc(sizeof(*task), GFP_ATOMIC); if (!task) { pm_runtime_put_autosuspend(cmdq->mbox.dev); @@ -436,6 +451,12 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data) static int cmdq_mbox_startup(struct mbox_chan *chan) { + struct cmdq *cmdq = dev_get_drvdata(chan->mbox->dev); + struct cmdq_thread *thread = (struct cmdq_thread *)chan->con_priv; + + if (CMDQ_IS_SECURE_THREAD(thread->idx, cmdq)) + cmdq_sec_mbox.ops->startup(chan); + return 0; } @@ -448,6 +469,13 @@ static void cmdq_mbox_shutdown(struct mbox_chan *chan) WARN_ON(pm_runtime_get_sync(cmdq->mbox.dev)); + if (CMDQ_IS_SECURE_THREAD(thread->idx, cmdq)) { + cmdq_sec_mbox.ops->shutdown(chan); + pm_runtime_mark_last_busy(cmdq->mbox.dev); + pm_runtime_put_autosuspend(cmdq->mbox.dev); + return; + } + spin_lock_irqsave(&thread->chan->lock, flags); if (list_empty(&thread->task_busy_list)) goto done; @@ -494,6 +522,13 @@ static int cmdq_mbox_flush(struct mbox_chan *chan, unsigned long timeout) if (ret < 0) return ret; + if (CMDQ_IS_SECURE_THREAD(thread->idx, cmdq)) { + cmdq_sec_mbox.ops->flush(chan, timeout); + pm_runtime_mark_last_busy(cmdq->mbox.dev); + pm_runtime_put_autosuspend(cmdq->mbox.dev); + return 0; + } + spin_lock_irqsave(&thread->chan->lock, flags); if (list_empty(&thread->task_busy_list)) goto out; @@ -569,6 +604,7 @@ static int cmdq_probe(struct platform_device *pdev) int alias_id = 0; static const char * const clk_name = "gce"; static const char * const clk_names[] = { "gce0", "gce1" }; + u32 hwid = 0; cmdq = devm_kzalloc(dev, sizeof(*cmdq), GFP_KERNEL); if (!cmdq) @@ -594,6 +630,8 @@ static int cmdq_probe(struct platform_device *pdev) dev, cmdq->base, cmdq->irq); if (cmdq->pdata->gce_num > 1) { + hwid = of_alias_get_id(dev->of_node, clk_name); + for_each_child_of_node(phandle->parent, node) { alias_id = of_alias_get_id(node, clk_name); if (alias_id >= 0 && alias_id < cmdq->pdata->gce_num) { @@ -643,6 +681,29 @@ static int cmdq_probe(struct platform_device *pdev) cmdq->mbox.chans[i].con_priv = (void *)&cmdq->thread[i]; } + if (cmdq->pdata->has_secure) { + struct platform_device *cmdq_sec; + static struct gce_sec_plat sec_plat = {0}; + + if (of_property_read_u32_index(dev->of_node, "mediatek,gce-events", 0, + &sec_plat.cmdq_event) == 0) { + sec_plat.mbox = &cmdq->mbox; + sec_plat.base = cmdq->base; + sec_plat.hwid = hwid; + sec_plat.secure_thread_nr = cmdq->pdata->secure_thread_nr; + sec_plat.secure_thread_min = cmdq->pdata->secure_thread_min; + + cmdq_sec = platform_device_register_data(dev, "mtk-cmdq-sec", + PLATFORM_DEVID_AUTO, + &sec_plat, + sizeof(sec_plat)); + if (IS_ERR(cmdq_sec)) { + dev_err(dev, "failed to register platform_device mtk-cmdq-sec\n"); + return PTR_ERR(cmdq_sec); + } + } + } + err = devm_mbox_controller_register(dev, &cmdq->mbox); if (err < 0) { dev_err(dev, "failed to register mailbox: %d\n", err); @@ -719,6 +780,9 @@ static const struct gce_plat gce_plat_mt8188 = { .thread_nr = 32, .shift = 3, .control_by_sw = true, + .has_secure = true, + .secure_thread_nr = 2, + .secure_thread_min = 8, .gce_num = 2 }; @@ -733,6 +797,9 @@ static const struct gce_plat gce_plat_mt8195 = { .thread_nr = 24, .shift = 3, .control_by_sw = true, + .has_secure = true, + .secure_thread_nr = 2, + .secure_thread_min = 8, .gce_num = 2 }; -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-04-03 10:26 UTC|newest] Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-04-03 10:25 [PATCH v5 00/10] Add CMDQ secure driver for SVP Shawn Sung 2024-04-03 10:25 ` Shawn Sung 2024-04-03 10:25 ` [PATCH v5 01/10] dt-bindings: gce: mt8195: Add CMDQ_SYNC_TOKEN_SECURE_THR_EOF event id Shawn Sung 2024-04-03 10:25 ` Shawn Sung 2024-04-03 10:25 ` [PATCH v5 02/10] dt-bindings: mailbox: Add mboxes property for CMDQ secure driver Shawn Sung 2024-04-03 10:25 ` Shawn Sung 2024-04-03 11:43 ` Rob Herring 2024-04-03 11:43 ` Rob Herring 2024-04-03 15:46 ` Conor Dooley 2024-04-03 15:46 ` Conor Dooley 2024-04-04 4:31 ` Jason-JH Lin (林睿祥) 2024-04-04 4:31 ` Jason-JH Lin (林睿祥) 2024-04-04 14:52 ` Conor Dooley 2024-04-04 14:52 ` Conor Dooley 2024-04-05 14:33 ` Jason-JH Lin (林睿祥) 2024-04-05 14:33 ` Jason-JH Lin (林睿祥) 2024-04-05 16:13 ` Conor Dooley 2024-04-05 16:13 ` Conor Dooley 2024-04-06 16:15 ` Jason-JH Lin (林睿祥) 2024-04-06 16:15 ` Jason-JH Lin (林睿祥) 2024-04-09 17:52 ` Conor Dooley 2024-04-09 17:52 ` Conor Dooley 2024-04-12 9:00 ` Jason-JH Lin (林睿祥) 2024-04-12 9:00 ` Jason-JH Lin (林睿祥) 2024-04-15 16:53 ` Conor Dooley 2024-04-15 16:53 ` Conor Dooley 2024-04-03 10:25 ` [PATCH v5 03/10] soc: mediatek: cmdq: Add cmdq_pkt_logic_command to support math operation Shawn Sung 2024-04-03 10:25 ` Shawn Sung 2024-04-03 10:25 ` [PATCH v5 04/10] soc: mediatek: cmdq: Add cmdq_pkt_write_s_reg_value to support write value to reg Shawn Sung 2024-04-03 10:25 ` Shawn Sung 2024-04-03 10:25 ` [PATCH v5 05/10] mailbox: mtk-cmdq: Support GCE loop packets in interrupt handler Shawn Sung 2024-04-03 10:25 ` Shawn Sung 2024-04-03 10:25 ` [PATCH v5 06/10] soc: mediatek: cmdq: Add cmdq_pkt_finalize_loop for looping cmd with irq Shawn Sung 2024-04-03 10:25 ` Shawn Sung 2024-04-03 10:25 ` [PATCH v5 07/10] mailbox: mediatek: Move reuseable definition to header for secure driver Shawn Sung 2024-04-03 10:25 ` Shawn Sung 2024-04-03 10:26 ` [PATCH v5 08/10] mailbox: mediatek: Add CMDQ secure mailbox driver Shawn Sung 2024-04-03 10:26 ` Shawn Sung 2024-04-03 10:26 ` Shawn Sung [this message] 2024-04-03 10:26 ` [PATCH v5 09/10] mailbox: mediatek: Add secure CMDQ driver support for CMDQ driver Shawn Sung 2024-04-03 10:26 ` [PATCH v5 10/10] drm/mediatek: Add interface to allocate MediaTek GEM buffer Shawn Sung 2024-04-03 10:26 ` Shawn Sung
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