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From: Vinod Govindapillai <vinod.govindapillai@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: vinod.govindapillai@intel.com, stanislav.lisovskiy@intel.com,
	ville.syrjala@intel.com, jani.saarinen@intel.com
Subject: [PATCH v10 3/6] drm/i915/display: extract code to prepare qgv points mask
Date: Fri,  5 Apr 2024 14:35:30 +0300	[thread overview]
Message-ID: <20240405113533.338553-4-vinod.govindapillai@intel.com> (raw)
In-Reply-To: <20240405113533.338553-1-vinod.govindapillai@intel.com>

Extract the code to prepare the QGV points mask as per the
format expected by the pcode as this could be utlized from
multiple points.

Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index c00094e5f11c..4fed84869e09 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -851,6 +851,14 @@ static unsigned int icl_max_bw_qgv_point_mask(struct drm_i915_private *i915,
 	return max_bw_point_mask;
 }
 
+static u16 icl_prepare_qgv_points_mask(struct drm_i915_private *i915,
+				       unsigned int qgv_points,
+				       unsigned int psf_points)
+{
+	return ~(ICL_PCODE_REQ_QGV_PT(qgv_points) |
+		 ADLS_PCODE_REQ_PSF_PT(psf_points)) & icl_qgv_points_mask(i915);
+}
+
 static int mtl_find_qgv_points(struct drm_i915_private *i915,
 			       unsigned int data_rate,
 			       unsigned int num_active_planes,
@@ -994,11 +1002,9 @@ static int icl_find_qgv_points(struct drm_i915_private *i915,
 	 * We store the ones which need to be masked as that is what PCode
 	 * actually accepts as a parameter.
 	 */
-	new_bw_state->qgv_points_mask =
-		~(ICL_PCODE_REQ_QGV_PT(qgv_points) |
-		  ADLS_PCODE_REQ_PSF_PT(psf_points)) &
-		icl_qgv_points_mask(i915);
-
+	new_bw_state->qgv_points_mask = icl_prepare_qgv_points_mask(i915,
+								    qgv_points,
+								    psf_points);
 	/*
 	 * If the actual mask had changed we need to make sure that
 	 * the commits are serialized(in case this is a nomodeset, nonblocking)
-- 
2.34.1


  parent reply	other threads:[~2024-04-05 11:36 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-05 11:35 [PATCH v10 0/6] QGV/SAGV related fixes Vinod Govindapillai
2024-04-05 11:35 ` [PATCH v10 1/6] drm/i915/display: Add meaningful traces for QGV point info error handling Vinod Govindapillai
2024-04-19 17:11   ` Ville Syrjälä
2024-04-05 11:35 ` [PATCH v10 2/6] drm/i915/display: Extract code required to calculate max qgv/psf gv point Vinod Govindapillai
2024-04-08  8:32   ` Lisovskiy, Stanislav
2024-04-08 10:25     ` Govindapillai, Vinod
2024-04-05 11:35 ` Vinod Govindapillai [this message]
2024-04-05 11:35 ` [PATCH v10 4/6] drm/i915/display: Disable SAGV on bw init, to force QGV point recalculation Vinod Govindapillai
2024-04-05 11:35 ` [PATCH v10 5/6] drm/i915/display: handle systems with duplicate psf gv points Vinod Govindapillai
2024-04-08  8:29   ` Lisovskiy, Stanislav
2024-04-08 10:18     ` Govindapillai, Vinod
2024-04-05 11:35 ` [PATCH v10 6/6] drm/i915/display: force qgv check after the hw state readout Vinod Govindapillai
2024-04-19 17:19   ` Ville Syrjälä
2024-04-23  7:40     ` Govindapillai, Vinod
2024-04-23  7:46       ` Govindapillai, Vinod
2024-04-22  7:54   ` Lisovskiy, Stanislav
2024-04-05 12:24 ` ✗ Fi.CI.SPARSE: warning for QGV/SAGV related fixes (rev10) Patchwork
2024-04-05 12:40 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-04-06  5:02 ` ✓ Fi.CI.BAT: success " Patchwork
2024-04-06  7:38 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-04-19  8:42 ` [PATCH v10 0/6] QGV/SAGV related fixes Hogander, Jouni
2024-04-19 13:32   ` Govindapillai, Vinod

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