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From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Animesh Manna" <animesh.manna@intel.com>,
	"Jouni Högander" <jouni.hogander@intel.com>
Subject: [PATCH 2/8] drm/i915/psr: Set intel_crtc_state->has_psr on panel replay as well
Date: Fri,  5 Apr 2024 14:35:56 +0300	[thread overview]
Message-ID: <20240405113602.992714-3-jouni.hogander@intel.com> (raw)
In-Reply-To: <20240405113602.992714-1-jouni.hogander@intel.com>

Current code is setting only intel_crtc_state->has_panel_replay in panel
replay case. There are lots of stuff behind intel_crtc_state->has_psr that
is needed for panel replay as well. Instead of converting each check to
has_psr || has_panel_replay set has_psr in case of panel replay as
well. Code can then differentiate between psr and panel replay by using
intel_crtc_state->has_panel_replay.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 45d13e042ade..10a7795cdb6f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1602,10 +1602,11 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 
 	if (CAN_PANEL_REPLAY(intel_dp))
 		crtc_state->has_panel_replay = true;
-	else
-		crtc_state->has_psr = _psr_compute_config(intel_dp, crtc_state);
 
-	if (!(crtc_state->has_panel_replay || crtc_state->has_psr))
+	crtc_state->has_psr = crtc_state->has_panel_replay ? true :
+		_psr_compute_config(intel_dp, crtc_state);
+
+	if (!crtc_state->has_psr)
 		return;
 
 	crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
@@ -1632,7 +1633,7 @@ void intel_psr_get_config(struct intel_encoder *encoder,
 		goto unlock;
 
 	if (intel_dp->psr.panel_replay_enabled) {
-		pipe_config->has_panel_replay = true;
+		pipe_config->has_psr = pipe_config->has_panel_replay = true;
 	} else {
 		/*
 		 * Not possible to read EDP_PSR/PSR2_CTL registers as it is
@@ -2651,7 +2652,7 @@ void intel_psr_post_plane_update(struct intel_atomic_state *state,
 		intel_atomic_get_new_crtc_state(state, crtc);
 	struct intel_encoder *encoder;
 
-	if (!(crtc_state->has_psr || crtc_state->has_panel_replay))
+	if (!crtc_state->has_psr)
 		return;
 
 	for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
-- 
2.34.1


  parent reply	other threads:[~2024-04-05 11:36 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-05 11:35 [PATCH 0/8] Panel Replay fixes and clean ups Jouni Högander
2024-04-05 11:35 ` [PATCH 1/8] drm/i915/psr: Add some documentation of variables used in psr code Jouni Högander
2024-04-05 11:35 ` Jouni Högander [this message]
2024-04-05 11:35 ` [PATCH 3/8] drm/i915/psr: Intel_psr_pause/resume needs to support panel replay Jouni Högander
2024-04-05 11:35 ` [PATCH 4/8] drm/i915/psr: Do not update phy power state in case of non-eDP " Jouni Högander
2024-04-05 11:35 ` [PATCH 5/8] drm/i915/psr: Check possible errors for panel replay as well Jouni Högander
2024-04-05 11:36 ` [PATCH 6/8] drm/i915/psr: Do not write registers/bits not applicable for panel replay Jouni Högander
2024-04-05 11:36 ` [PATCH 7/8] drm/i915/psr: Unify panel replay enable/disable sink Jouni Högander
2024-04-05 11:36 ` [PATCH 8/8] drm/i915/psr: Panel replay has to be enabled before link training Jouni Högander
2024-04-05 12:56 ` ✗ Fi.CI.CHECKPATCH: warning for Panel Replay fixes and clean ups Patchwork
2024-04-05 13:03 ` ✓ Fi.CI.BAT: success " Patchwork
2024-04-05 18:03 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-04-08  7:22   ` Hogander, Jouni
2024-04-08  7:54 ` [PATCH 0/8] " Hogander, Jouni

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