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From: Sean Christopherson <seanjc@google.com>
To: Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	 Sandipan Das <sandipan.das@amd.com>,
	Jim Mattson <jmattson@google.com>,
	 Like Xu <like.xu.linux@gmail.com>
Subject: [PATCH 08/10] KVM: x86: Allow SYSENTER in Compatibility Mode for all Intel compat vCPUs
Date: Fri,  5 Apr 2024 16:56:01 -0700	[thread overview]
Message-ID: <20240405235603.1173076-9-seanjc@google.com> (raw)
In-Reply-To: <20240405235603.1173076-1-seanjc@google.com>

Emulate SYSENTER in Compatibility Mode for all vCPUs models that are
compatible with Intel's architecture, as the behavior if SYSENTER is
architecturally defined in Intel's SDM, i.e. should be followed by any
CPU that implements Intel's architecture.

Signed-off-by: Sean Christopherson <seanjc@google.com>
---
 arch/x86/kvm/emulate.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index 1fb73d96bdf0..26e8c197a1d1 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -2354,6 +2354,7 @@ setup_syscalls_segments(struct desc_struct *cs, struct desc_struct *ss)
 	ss->avl = 0;
 }
 
+#ifdef CONFIG_X86_64
 static bool vendor_intel(struct x86_emulate_ctxt *ctxt)
 {
 	u32 eax, ebx, ecx, edx;
@@ -2362,6 +2363,7 @@ static bool vendor_intel(struct x86_emulate_ctxt *ctxt)
 	ctxt->ops->get_cpuid(ctxt, &eax, &ebx, &ecx, &edx, true);
 	return is_guest_vendor_intel(ebx, ecx, edx);
 }
+#endif
 
 static int em_syscall(struct x86_emulate_ctxt *ctxt)
 {
@@ -2444,11 +2446,11 @@ static int em_sysenter(struct x86_emulate_ctxt *ctxt)
 		return emulate_gp(ctxt, 0);
 
 	/*
-	 * Not recognized on AMD in compat mode (but is recognized in legacy
-	 * mode).
+	 * Intel's architecture allows SYSENTER in compatibility mode, but AMD
+	 * does not.  Note, AMD does allow SYSENTER in legacy protected mode.
 	 */
-	if ((ctxt->mode != X86EMUL_MODE_PROT64) && (efer & EFER_LMA)
-	    && !vendor_intel(ctxt))
+	if ((ctxt->mode != X86EMUL_MODE_PROT64) && (efer & EFER_LMA) &&
+	    !ctxt->ops->guest_cpuid_is_intel_compatible(ctxt))
 		return emulate_ud(ctxt);
 
 	/* sysenter/sysexit have not been tested in 64bit mode. */
-- 
2.44.0.478.gd926399ef9-goog


  parent reply	other threads:[~2024-04-05 23:56 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-05 23:55 [PATCH 00/10] KVM: x86: Fix LVTPC masking on AMD CPUs Sean Christopherson
2024-04-05 23:55 ` [PATCH 01/10] KVM: x86: Snapshot if a vCPU's vendor model is AMD vs. Intel compatible Sean Christopherson
2024-04-05 23:55 ` [PATCH 02/10] KVM: x86/pmu: Do not mask LVTPC when handling a PMI on AMD platforms Sean Christopherson
2024-04-05 23:55 ` [PATCH 03/10] KVM: x86/pmu: Squash period for checkpointed events based on host HLE/RTM Sean Christopherson
2024-04-05 23:55 ` [PATCH 04/10] KVM: x86: Apply Intel's TSC_AUX reserved-bit behavior to Intel compat vCPUs Sean Christopherson
2024-04-05 23:55 ` [PATCH 05/10] KVM: x86: Inhibit code #DBs in MOV-SS shadow for all " Sean Christopherson
2024-04-05 23:55 ` [PATCH 06/10] KVM: x86: Use "is Intel compatible" helper to emulate SYSCALL in !64-bit Sean Christopherson
2024-04-05 23:56 ` [PATCH 07/10] KVM: SVM: Emulate SYSENTER RIP/RSP behavior for all Intel compat vCPUs Sean Christopherson
2024-04-05 23:56 ` Sean Christopherson [this message]
2024-04-05 23:56 ` [PATCH 09/10] KVM: x86: Open code vendor_intel() in string_registers_quirk() Sean Christopherson
2024-04-05 23:56 ` [PATCH 10/10] KVM: x86: Bury guest_cpuid_is_amd_or_hygon() in cpuid.c Sean Christopherson
2024-04-09  2:01 ` [PATCH 00/10] KVM: x86: Fix LVTPC masking on AMD CPUs Sean Christopherson
2024-04-11 17:03 ` Paolo Bonzini

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