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From: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>,
	Matt Roper <matthew.d.roper@intel.com>,
	Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>,
	Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Subject: [PATCH v3 15/21] drm/i915/bmg: BMG should re-use MTL's south display logic
Date: Mon, 15 Apr 2024 13:44:17 +0530	[thread overview]
Message-ID: <20240415081423.495834-16-balasubramani.vivekanandan@intel.com> (raw)
In-Reply-To: <20240415081423.495834-1-balasubramani.vivekanandan@intel.com>

From: Matt Roper <matthew.d.roper@intel.com>

Battlemage's south display is the same as Meteor Lake's, including the
need to invert the HPD pins, which Lunar Lake does not need.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Reviewed-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
---
 drivers/gpu/drm/i915/soc/intel_pch.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/soc/intel_pch.c b/drivers/gpu/drm/i915/soc/intel_pch.c
index 3cad6dac06b0..542eea50093c 100644
--- a/drivers/gpu/drm/i915/soc/intel_pch.c
+++ b/drivers/gpu/drm/i915/soc/intel_pch.c
@@ -218,10 +218,10 @@ void intel_detect_pch(struct drm_i915_private *dev_priv)
 	if (DISPLAY_VER(dev_priv) >= 20) {
 		dev_priv->pch_type = PCH_LNL;
 		return;
-	} else if (IS_METEORLAKE(dev_priv)) {
+	} else if (IS_BATTLEMAGE(dev_priv) || IS_METEORLAKE(dev_priv)) {
 		/*
 		 * Both north display and south display are on the SoC die.
-		 * The real PCH is uninvolved in display.
+		 * The real PCH (if it even exists) is uninvolved in display.
 		 */
 		dev_priv->pch_type = PCH_MTL;
 		return;
-- 
2.25.1


  parent reply	other threads:[~2024-04-15  8:14 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-15  8:14 [PATCH v3 00/21] Enable display support for Battlemage Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 01/21] drm/xe/display: Lane reversal requires writes to both context lanes Balasubramani Vivekanandan
2024-04-15 15:05   ` Matt Roper
2024-04-15  8:14 ` [PATCH v3 02/21] drm/i915/display: Enable RM timeout detection Balasubramani Vivekanandan
2024-04-15 15:49   ` Matt Roper
2024-04-15  8:14 ` [PATCH v3 03/21] drm/i915/bmg: Define IS_BATTLEMAGE macro Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 04/21] drm/i915/xe2hpd: Skip CCS modifiers Balasubramani Vivekanandan
2024-04-15 16:06   ` Matt Roper
2024-04-16 11:15     ` Juha-Pekka Heikkila
2024-04-15  8:14 ` [PATCH v3 05/21] drm/i915/xe2hpd: Initial cdclk table Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 06/21] drm/i915/bmg: Extend DG2 tc check to future Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 07/21] drm/i915/xe2hpd: Properly disable power in port A Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 08/21] drm/i915/xe2hpd: Add new C20 PHY SRAM address Balasubramani Vivekanandan
2024-04-15 15:32   ` Jani Nikula
2024-04-15  8:14 ` [PATCH v3 09/21] drm/i915/xe2hpd: Add support for eDP PLL configuration Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 10/21] drm/i915/xe2hpd: update pll values in sync with Bspec Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 11/21] drm/i915/xe2hpd: Add display info Balasubramani Vivekanandan
2024-04-15 16:22   ` Matt Roper
2024-04-15  8:14 ` [PATCH v3 12/21] drm/i915/xe2hpd: Configure CHICKEN_MISC_2 before enabling planes Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 13/21] drm/i915/xe2hpd: Add max memory bandwidth algorithm Balasubramani Vivekanandan
2024-04-15 19:52   ` Sripada, Radhakrishna
2024-04-15  8:14 ` [PATCH v3 14/21] drm/i915/xe2hpd: Do not program MBUS_DBOX BW credits Balasubramani Vivekanandan
2024-04-15 16:25   ` Matt Roper
2024-04-15  8:14 ` Balasubramani Vivekanandan [this message]
2024-04-15  8:14 ` [PATCH v3 16/21] Revert "drm/i915/dgfx: DGFX uses direct VBT pin mapping" Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 17/21] drm/i915/xe2hpd: Set maximum DP rate to UHBR13.5 Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 18/21] drm/xe/gt_print: add xe_gt_err_once() Balasubramani Vivekanandan
2024-04-15  8:14 ` [PATCH v3 19/21] drm/xe/device: implement transient flush Balasubramani Vivekanandan
2024-04-15 17:00   ` Matt Roper
2024-04-15  8:14 ` [PATCH v3 20/21] drm/i915/display: perform " Balasubramani Vivekanandan
2024-04-15 17:07   ` Matt Roper
2024-04-15 18:14     ` Matt Roper
2024-04-16  7:40       ` Matthew Auld
2024-04-15 20:55     ` Nirmoy Das
2024-04-15  8:14 ` [PATCH v3 21/21] drm/xe/bmg: Enable the display support Balasubramani Vivekanandan
2024-04-15 19:43 ` ✓ CI.Patch_applied: success for Enable display support for Battlemage Patchwork
2024-04-15 19:43 ` ✗ CI.checkpatch: warning " Patchwork
2024-04-15 19:44 ` ✓ CI.KUnit: success " Patchwork
2024-04-15 19:56 ` ✓ CI.Build: " Patchwork
2024-04-15 19:58 ` ✓ CI.Hooks: " Patchwork
2024-04-15 20:00 ` ✗ CI.checksparse: warning " Patchwork
2024-04-15 20:25 ` ✓ CI.BAT: success " Patchwork
2024-04-15 20:58 ` ✗ Fi.CI.CHECKPATCH: warning " Patchwork
2024-04-15 20:58 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-04-15 21:14 ` ✓ Fi.CI.BAT: success " Patchwork
2024-04-16  8:31 ` ✓ Fi.CI.IGT: " Patchwork
2024-04-16  9:37 ` ✓ CI.FULL: " Patchwork

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