From: Antonio Borneo <antonio.borneo@foss.st.com> To: Thomas Gleixner <tglx@linutronix.de>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue <alexandre.torgue@foss.st.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org> Cc: Antonio Borneo <antonio.borneo@foss.st.com>, Fabrice Gasnier <fabrice.gasnier@foss.st.com>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, <linux-arm-kernel@lists.infradead.org> Subject: [PATCH v2 05/11] irqchip/stm32-exti: Skip secure events Date: Mon, 15 Apr 2024 15:49:20 +0200 [thread overview] Message-ID: <20240415134926.1254428-6-antonio.borneo@foss.st.com> (raw) In-Reply-To: <20240216094758.916722-1-antonio.borneo@foss.st.com> Secure OS can reserve some EXTI event, marking them as "secure" by setting the corresponding bit in register SECCFGR (aka TZENR). These events cannot be used by Linux. Read the list of reserved events and check it during irq domain allocation. Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> --- drivers/irqchip/irq-stm32-exti.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c index ded20d9bde73f..c0a020aab557a 100644 --- a/drivers/irqchip/irq-stm32-exti.c +++ b/drivers/irqchip/irq-stm32-exti.c @@ -36,6 +36,7 @@ struct stm32_exti_bank { u32 rpr_ofst; u32 fpr_ofst; u32 trg_ofst; + u32 seccfgr_ofst; }; #define UNDEF_REG ~0 @@ -54,10 +55,12 @@ struct stm32_exti_chip_data { u32 mask_cache; u32 rtsr_cache; u32 ftsr_cache; + u32 event_reserved; }; struct stm32_exti_host_data { void __iomem *base; + struct device *dev; struct stm32_exti_chip_data *chips_data; const struct stm32_exti_drv_data *drv_data; struct hwspinlock *hwlock; @@ -73,6 +76,7 @@ static const struct stm32_exti_bank stm32f4xx_exti_b1 = { .rpr_ofst = 0x14, .fpr_ofst = UNDEF_REG, .trg_ofst = UNDEF_REG, + .seccfgr_ofst = UNDEF_REG, }; static const struct stm32_exti_bank *stm32f4xx_exti_banks[] = { @@ -93,6 +97,7 @@ static const struct stm32_exti_bank stm32h7xx_exti_b1 = { .rpr_ofst = 0x88, .fpr_ofst = UNDEF_REG, .trg_ofst = UNDEF_REG, + .seccfgr_ofst = UNDEF_REG, }; static const struct stm32_exti_bank stm32h7xx_exti_b2 = { @@ -104,6 +109,7 @@ static const struct stm32_exti_bank stm32h7xx_exti_b2 = { .rpr_ofst = 0x98, .fpr_ofst = UNDEF_REG, .trg_ofst = UNDEF_REG, + .seccfgr_ofst = UNDEF_REG, }; static const struct stm32_exti_bank stm32h7xx_exti_b3 = { @@ -115,6 +121,7 @@ static const struct stm32_exti_bank stm32h7xx_exti_b3 = { .rpr_ofst = 0xA8, .fpr_ofst = UNDEF_REG, .trg_ofst = UNDEF_REG, + .seccfgr_ofst = UNDEF_REG, }; static const struct stm32_exti_bank *stm32h7xx_exti_banks[] = { @@ -137,6 +144,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b1 = { .rpr_ofst = 0x0C, .fpr_ofst = 0x10, .trg_ofst = 0x3EC, + .seccfgr_ofst = 0x14, }; static const struct stm32_exti_bank stm32mp1_exti_b2 = { @@ -148,6 +156,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b2 = { .rpr_ofst = 0x2C, .fpr_ofst = 0x30, .trg_ofst = 0x3E8, + .seccfgr_ofst = 0x34, }; static const struct stm32_exti_bank stm32mp1_exti_b3 = { @@ -159,6 +168,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b3 = { .rpr_ofst = 0x4C, .fpr_ofst = 0x50, .trg_ofst = 0x3E4, + .seccfgr_ofst = 0x54, }; static const struct stm32_exti_bank *stm32mp1_exti_banks[] = { @@ -706,6 +716,12 @@ static int stm32_exti_h_domain_alloc(struct irq_domain *dm, bank = hwirq / IRQS_PER_BANK; chip_data = &host_data->chips_data[bank]; + /* Check if event is reserved (Secure) */ + if (chip_data->event_reserved & BIT(hwirq % IRQS_PER_BANK)) { + dev_err(host_data->dev, "event %lu is reserved, secure\n", hwirq); + return -EPERM; + } + event_trg = readl_relaxed(host_data->base + chip_data->reg_bank->trg_ofst); chip = (event_trg & BIT(hwirq % IRQS_PER_BANK)) ? &stm32_exti_h_chip : &stm32_exti_h_chip_direct; @@ -803,6 +819,10 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data, if (stm32_bank->emr_ofst != UNDEF_REG) writel_relaxed(0, base + stm32_bank->emr_ofst); + /* reserve Secure events */ + if (stm32_bank->seccfgr_ofst != UNDEF_REG) + chip_data->event_reserved = readl_relaxed(base + stm32_bank->seccfgr_ofst); + pr_info("%pOF: bank%d\n", node, bank_idx); return chip_data; @@ -908,6 +928,7 @@ static int stm32_exti_probe(struct platform_device *pdev) return -ENOMEM; dev_set_drvdata(dev, host_data); + host_data->dev = dev; /* check for optional hwspinlock which may be not available yet */ ret = of_hwspin_lock_get_id(np, 0); -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Antonio Borneo <antonio.borneo@foss.st.com> To: Thomas Gleixner <tglx@linutronix.de>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue <alexandre.torgue@foss.st.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org> Cc: Antonio Borneo <antonio.borneo@foss.st.com>, Fabrice Gasnier <fabrice.gasnier@foss.st.com>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, <linux-arm-kernel@lists.infradead.org> Subject: [PATCH v2 05/11] irqchip/stm32-exti: Skip secure events Date: Mon, 15 Apr 2024 15:49:20 +0200 [thread overview] Message-ID: <20240415134926.1254428-6-antonio.borneo@foss.st.com> (raw) In-Reply-To: <20240216094758.916722-1-antonio.borneo@foss.st.com> Secure OS can reserve some EXTI event, marking them as "secure" by setting the corresponding bit in register SECCFGR (aka TZENR). These events cannot be used by Linux. Read the list of reserved events and check it during irq domain allocation. Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> --- drivers/irqchip/irq-stm32-exti.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c index ded20d9bde73f..c0a020aab557a 100644 --- a/drivers/irqchip/irq-stm32-exti.c +++ b/drivers/irqchip/irq-stm32-exti.c @@ -36,6 +36,7 @@ struct stm32_exti_bank { u32 rpr_ofst; u32 fpr_ofst; u32 trg_ofst; + u32 seccfgr_ofst; }; #define UNDEF_REG ~0 @@ -54,10 +55,12 @@ struct stm32_exti_chip_data { u32 mask_cache; u32 rtsr_cache; u32 ftsr_cache; + u32 event_reserved; }; struct stm32_exti_host_data { void __iomem *base; + struct device *dev; struct stm32_exti_chip_data *chips_data; const struct stm32_exti_drv_data *drv_data; struct hwspinlock *hwlock; @@ -73,6 +76,7 @@ static const struct stm32_exti_bank stm32f4xx_exti_b1 = { .rpr_ofst = 0x14, .fpr_ofst = UNDEF_REG, .trg_ofst = UNDEF_REG, + .seccfgr_ofst = UNDEF_REG, }; static const struct stm32_exti_bank *stm32f4xx_exti_banks[] = { @@ -93,6 +97,7 @@ static const struct stm32_exti_bank stm32h7xx_exti_b1 = { .rpr_ofst = 0x88, .fpr_ofst = UNDEF_REG, .trg_ofst = UNDEF_REG, + .seccfgr_ofst = UNDEF_REG, }; static const struct stm32_exti_bank stm32h7xx_exti_b2 = { @@ -104,6 +109,7 @@ static const struct stm32_exti_bank stm32h7xx_exti_b2 = { .rpr_ofst = 0x98, .fpr_ofst = UNDEF_REG, .trg_ofst = UNDEF_REG, + .seccfgr_ofst = UNDEF_REG, }; static const struct stm32_exti_bank stm32h7xx_exti_b3 = { @@ -115,6 +121,7 @@ static const struct stm32_exti_bank stm32h7xx_exti_b3 = { .rpr_ofst = 0xA8, .fpr_ofst = UNDEF_REG, .trg_ofst = UNDEF_REG, + .seccfgr_ofst = UNDEF_REG, }; static const struct stm32_exti_bank *stm32h7xx_exti_banks[] = { @@ -137,6 +144,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b1 = { .rpr_ofst = 0x0C, .fpr_ofst = 0x10, .trg_ofst = 0x3EC, + .seccfgr_ofst = 0x14, }; static const struct stm32_exti_bank stm32mp1_exti_b2 = { @@ -148,6 +156,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b2 = { .rpr_ofst = 0x2C, .fpr_ofst = 0x30, .trg_ofst = 0x3E8, + .seccfgr_ofst = 0x34, }; static const struct stm32_exti_bank stm32mp1_exti_b3 = { @@ -159,6 +168,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b3 = { .rpr_ofst = 0x4C, .fpr_ofst = 0x50, .trg_ofst = 0x3E4, + .seccfgr_ofst = 0x54, }; static const struct stm32_exti_bank *stm32mp1_exti_banks[] = { @@ -706,6 +716,12 @@ static int stm32_exti_h_domain_alloc(struct irq_domain *dm, bank = hwirq / IRQS_PER_BANK; chip_data = &host_data->chips_data[bank]; + /* Check if event is reserved (Secure) */ + if (chip_data->event_reserved & BIT(hwirq % IRQS_PER_BANK)) { + dev_err(host_data->dev, "event %lu is reserved, secure\n", hwirq); + return -EPERM; + } + event_trg = readl_relaxed(host_data->base + chip_data->reg_bank->trg_ofst); chip = (event_trg & BIT(hwirq % IRQS_PER_BANK)) ? &stm32_exti_h_chip : &stm32_exti_h_chip_direct; @@ -803,6 +819,10 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data, if (stm32_bank->emr_ofst != UNDEF_REG) writel_relaxed(0, base + stm32_bank->emr_ofst); + /* reserve Secure events */ + if (stm32_bank->seccfgr_ofst != UNDEF_REG) + chip_data->event_reserved = readl_relaxed(base + stm32_bank->seccfgr_ofst); + pr_info("%pOF: bank%d\n", node, bank_idx); return chip_data; @@ -908,6 +928,7 @@ static int stm32_exti_probe(struct platform_device *pdev) return -ENOMEM; dev_set_drvdata(dev, host_data); + host_data->dev = dev; /* check for optional hwspinlock which may be not available yet */ ret = of_hwspin_lock_get_id(np, 0); -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-04-15 13:51 UTC|newest] Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-02-16 9:47 [PATCH 00/12] irqchip/stm32-exti: add irq-map and STM32MP25 support Antonio Borneo 2024-02-16 9:47 ` Antonio Borneo 2024-02-16 9:47 ` [PATCH 01/12] irqchip/stm32-exti: Fix minor indentation issue Antonio Borneo 2024-02-16 9:47 ` Antonio Borneo 2024-02-19 14:16 ` Thomas Gleixner 2024-02-19 14:16 ` Thomas Gleixner 2024-02-16 9:47 ` [PATCH 02/12] dt-bindings: interrupt-controller: stm32-exti: Add irq nexus child node Antonio Borneo 2024-02-16 9:47 ` Antonio Borneo 2024-02-19 14:19 ` Thomas Gleixner 2024-02-19 14:19 ` Thomas Gleixner 2024-04-15 13:37 ` Antonio Borneo 2024-04-15 13:37 ` Antonio Borneo 2024-02-22 23:43 ` Rob Herring 2024-02-22 23:43 ` Rob Herring 2024-02-23 13:39 ` Antonio Borneo 2024-02-23 13:39 ` Antonio Borneo 2024-02-16 9:47 ` [PATCH 03/12] irqchip/stm32-exti: Map interrupts through interrupt nexus node Antonio Borneo 2024-02-16 9:47 ` Antonio Borneo 2024-02-19 14:22 ` Thomas Gleixner 2024-02-19 14:22 ` Thomas Gleixner 2024-02-16 9:47 ` [PATCH 04/12] irqchip/stm32-exti: Convert driver to standard PM Antonio Borneo 2024-02-16 9:47 ` Antonio Borneo 2024-02-16 9:47 ` [PATCH 05/12] irqchip/stm32-exti: Skip secure events Antonio Borneo 2024-02-16 9:47 ` Antonio Borneo 2024-02-16 9:47 ` [PATCH 06/12] irqchip/stm32-exti: Mark events reserved with RIF configuration check Antonio Borneo 2024-02-16 9:47 ` Antonio Borneo 2024-02-16 9:47 ` [PATCH 07/12] arm64: Kconfig.platforms: Enable STM32_EXTI for ARCH_STM32 Antonio Borneo 2024-02-16 9:47 ` Antonio Borneo 2024-02-16 9:47 ` [PATCH 08/12] ARM: dts: stm32: Use exti interrupt-map on stm32mp151 Antonio Borneo 2024-02-16 9:47 ` Antonio Borneo 2024-02-16 9:47 ` [PATCH 09/12] ARM: dts: stm32: Use exti interrupt-map on stm32mp131 Antonio Borneo 2024-02-16 9:47 ` Antonio Borneo 2024-02-16 9:47 ` [PATCH 10/12] arm64: dts: st: Add v2m to GIC node on stm32mp251 Antonio Borneo 2024-02-16 9:47 ` Antonio Borneo 2024-02-16 9:47 ` [PATCH 11/12] arm64: dts: st: Add exti1 and exti2 nodes " Antonio Borneo 2024-02-16 9:47 ` Antonio Borneo 2024-02-16 9:47 ` [PATCH 12/12] arm64: dts: st: Add interrupt parent to pinctrl " Antonio Borneo 2024-02-16 9:47 ` Antonio Borneo 2024-04-15 13:49 ` [PATCH v2 00/11] irqchip/stm32-exti: add irq map in DT and STM32MP25 support Antonio Borneo 2024-04-15 13:49 ` Antonio Borneo 2024-04-15 13:49 ` [PATCH v2 01/11] irqchip/stm32-exti: Fix minor indentation issue Antonio Borneo 2024-04-15 13:49 ` Antonio Borneo 2024-04-22 22:45 ` [tip: irq/core] " tip-bot2 for Antonio Borneo 2024-04-15 13:49 ` [PATCH v2 02/11] dt-bindings: interrupt-controller: stm32-exti: Add irq mapping to parent Antonio Borneo 2024-04-15 13:49 ` Antonio Borneo 2024-04-17 18:09 ` Rob Herring 2024-04-17 18:09 ` Rob Herring 2024-04-22 22:45 ` [tip: irq/core] " tip-bot2 for Antonio Borneo 2024-04-15 13:49 ` [PATCH v2 03/11] irqchip/stm32-exti: Map interrupts through interrupts-extended Antonio Borneo 2024-04-15 13:49 ` Antonio Borneo 2024-04-22 22:45 ` [tip: irq/core] " tip-bot2 for Antonio Borneo 2024-04-15 13:49 ` [PATCH v2 04/11] irqchip/stm32-exti: Convert driver to standard PM Antonio Borneo 2024-04-15 13:49 ` Antonio Borneo 2024-04-22 22:45 ` [tip: irq/core] " tip-bot2 for Antonio Borneo 2024-04-15 13:49 ` Antonio Borneo [this message] 2024-04-15 13:49 ` [PATCH v2 05/11] irqchip/stm32-exti: Skip secure events Antonio Borneo 2024-04-22 22:45 ` [tip: irq/core] " tip-bot2 for Antonio Borneo 2024-04-15 13:49 ` [PATCH v2 06/11] irqchip/stm32-exti: Mark events reserved with RIF configuration check Antonio Borneo 2024-04-15 13:49 ` Antonio Borneo 2024-04-22 22:45 ` [tip: irq/core] " tip-bot2 for Antonio Borneo 2024-04-15 13:49 ` [PATCH v2 07/11] arm64: Kconfig.platforms: Enable STM32_EXTI for ARCH_STM32 Antonio Borneo 2024-04-15 13:49 ` Antonio Borneo 2024-04-22 22:45 ` [tip: irq/core] " tip-bot2 for Antonio Borneo 2024-04-15 13:49 ` [PATCH v2 08/11] ARM: dts: stm32: List exti parent interrupts on stm32mp151 Antonio Borneo 2024-04-15 13:49 ` Antonio Borneo 2024-04-22 22:45 ` [tip: irq/core] " tip-bot2 for Antonio Borneo 2024-04-15 13:49 ` [PATCH v2 09/11] ARM: dts: stm32: List exti parent interrupts on stm32mp131 Antonio Borneo 2024-04-15 13:49 ` Antonio Borneo 2024-04-22 22:45 ` [tip: irq/core] " tip-bot2 for Antonio Borneo 2024-04-15 13:49 ` [PATCH v2 10/11] arm64: dts: st: Add exti1 and exti2 nodes on stm32mp251 Antonio Borneo 2024-04-15 13:49 ` Antonio Borneo 2024-04-22 22:45 ` [tip: irq/core] " tip-bot2 for Antonio Borneo 2024-04-15 13:49 ` [PATCH v2 11/11] arm64: dts: st: Add interrupt parent to pinctrl " Antonio Borneo 2024-04-15 13:49 ` Antonio Borneo 2024-04-22 22:45 ` [tip: irq/core] " tip-bot2 for Antonio Borneo
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