[PATCH 1/2] drm/i915: Add SCLKGATE_DIS register definition

From: Suraj Kandpal <suraj.kandpal@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: chaitanya.kumar.borah@intel.com, uma.shankar@intel.com,
	ankit.k.nautiyal@intel.com, dnyaneshwar.bhadane@intel.com,
	Suraj Kandpal <suraj.kandpal@intel.com>
Subject: [PATCH 1/2] drm/i915: Add SCLKGATE_DIS register definition
Date: Tue, 16 Apr 2024 12:57:33 +0530	[thread overview]
Message-ID: <20240416072733.624048-3-suraj.kandpal@intel.com> (raw)
In-Reply-To: <20240416072733.624048-2-suraj.kandpal@intel.com>

Add SCLKGATE_DIS register and it's register definition which
will be used the next patch.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3f34efcd7d6c..beec91a2f493 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6250,6 +6250,10 @@ enum skl_power_gate {
 #define  SFUSE_STRAP_DDIC_DETECTED	(1 << 1)
 #define  SFUSE_STRAP_DDID_DETECTED	(1 << 0)
 
+/* SCLKGATE_DIS */
+#define SCLKGATE_DIS			_MMIO(0xc2014)
+#define  DPLS_GATING_DISABLE		REG_BIT(29)
+
 #define WM_MISC				_MMIO(0x45260)
 #define  WM_MISC_DATA_PARTITION_5_6	(1 << 0)
 
-- 
2.43.2

