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From: Marijn Suijten <marijn.suijten@somainline.org>
To: Rob Clark <robdclark@gmail.com>,
	 Abhinav Kumar <quic_abhinavk@quicinc.com>,
	 Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Sean Paul <sean@poorly.run>,  David Airlie <airlied@gmail.com>,
	Daniel Vetter <daniel@ffwll.ch>,
	 Archit Taneja <architt@codeaurora.org>,
	 Chandan Uddaraju <chandanu@codeaurora.org>,
	Vinod Koul <vkoul@kernel.org>,
	 Sravanthi Kollukuduru <skolluku@codeaurora.org>
Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	 freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	 Jordan Crouse <jordan@cosmicpenguin.net>,
	 Rajesh Yadav <ryadav@codeaurora.org>,
	 Jeykumar Sankaran <jsanka@codeaurora.org>,
	 ~postmarketos/upstreaming@lists.sr.ht,
	 AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	 Konrad Dybcio <konrad.dybcio@linaro.org>,
	 Martin Botka <martin.botka@somainline.org>,
	 Jami Kettunen <jami.kettunen@somainline.org>,
	 Marijn Suijten <marijn.suijten@somainline.org>
Subject: [PATCH 2/7] drm/msm/dsi: Pass bonded-DSI hdisplay/2 to DSC timing configuration
Date: Wed, 17 Apr 2024 01:57:42 +0200	[thread overview]
Message-ID: <20240417-drm-msm-initial-dualpipe-dsc-fixes-v1-2-78ae3ee9a697@somainline.org> (raw)
In-Reply-To: <20240417-drm-msm-initial-dualpipe-dsc-fixes-v1-0-78ae3ee9a697@somainline.org>

When configuring the timing of DSI hosts (interfaces) in
dsi_timing_setup() all values written to registers are taking bonded
DSI into account by dividing the original mode width by 2 (half the
data is sent over each of the two DSI hosts), but the full width
instead of the interface width is passed as hdisplay parameter to
dsi_update_dsc_timing().

Currently only msm_dsc_get_slices_per_intf() is called within
dsi_update_dsc_timing() with the `hdisplay` argument which clearly
documents that it wants the width of a single interface (which, again,
in bonded DSI mode is half the total width of the mode).  Thus pass the
bonded-mode-adjusted hdisplay parameter into dsi_update_dsc_timing()
otherwise all values written to registers by this function (i.e. the
number of slices per interface or packet, and derived from this the EOL
byte number) are twice too large.

Inversely the panel driver is expected to only set the slice width and
number of slices for half the panel, i.e. what will be sent by each
host individually, rather than fixing that up like hdisplay here.

Fixes: 08802f515c3c ("drm/msm/dsi: Add support for DSC configuration")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
---
 drivers/gpu/drm/msm/dsi/dsi_host.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index c80be74cf10b..9d0c940dcb28 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -987,7 +987,7 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
 
 	if (msm_host->mode_flags & MIPI_DSI_MODE_VIDEO) {
 		if (msm_host->dsc)
-			dsi_update_dsc_timing(msm_host, false, mode->hdisplay);
+			dsi_update_dsc_timing(msm_host, false, hdisplay);
 
 		dsi_write(msm_host, REG_DSI_ACTIVE_H,
 			DSI_ACTIVE_H_START(ha_start) |
@@ -1008,7 +1008,7 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
 			DSI_ACTIVE_VSYNC_VPOS_END(vs_end));
 	} else {		/* command mode */
 		if (msm_host->dsc)
-			dsi_update_dsc_timing(msm_host, true, mode->hdisplay);
+			dsi_update_dsc_timing(msm_host, true, hdisplay);
 
 		/* image data and 1 byte write_memory_start cmd */
 		if (!msm_host->dsc)

-- 
2.44.0


  parent reply	other threads:[~2024-04-16 23:57 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-16 23:57 [PATCH 0/7] drm/msm: Initial fixes for DUALPIPE (+DSC) topology Marijn Suijten
2024-04-16 23:57 ` [PATCH 1/7] drm/msm/dsi: Print dual-DSI-adjusted pclk instead of original mode pclk Marijn Suijten
2024-04-17 11:56   ` Dmitry Baryshkov
2024-04-16 23:57 ` Marijn Suijten [this message]
2024-04-17 11:58   ` [PATCH 2/7] drm/msm/dsi: Pass bonded-DSI hdisplay/2 to DSC timing configuration Dmitry Baryshkov
2024-04-19 22:18     ` Marijn Suijten
2024-04-19 22:59       ` Dmitry Baryshkov
2024-04-16 23:57 ` [PATCH 3/7] drm/msm/dpu: Always flush the slave INTF on the CTL Marijn Suijten
2024-04-17 11:58   ` Dmitry Baryshkov
2024-04-23 18:40   ` Abhinav Kumar
2024-04-16 23:57 ` [PATCH 4/7] drm/msm/dpu: Allow configuring multiple active DSC blocks Marijn Suijten
2024-04-17 11:59   ` Dmitry Baryshkov
2024-04-16 23:57 ` [PATCH 5/7] drm/msm/dpu: Correct dual-ctl -> dual-intf typo in comment Marijn Suijten
2024-04-17 23:30   ` Dmitry Baryshkov
2024-04-28 21:06     ` Marijn Suijten
2024-04-16 23:57 ` [PATCH 6/7] drm/msm/dsi: Set PHY usescase before registering DSI host Marijn Suijten
2024-04-17  8:18   ` Dmitry Baryshkov
2024-04-17 12:50     ` Marijn Suijten
2024-04-16 23:57 ` [PATCH 7/7] drm/msm/dpu: Rename `ctx` parameter to `intf` to match other functions Marijn Suijten
2024-04-17 23:33   ` Dmitry Baryshkov

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