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From: Anshuman Khandual <anshuman.khandual@arm.com>
To: linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com
Cc: Anshuman Khandual <anshuman.khandual@arm.com>,
	Will Deacon <will@kernel.org>, Mark Brown <broonie@kernel.org>,
	linux-kernel@vger.kernel.org
Subject: [PATCH 1/4] arm64/sysreg: Add register fields for MDSELR_EL1
Date: Wed, 17 Apr 2024 07:47:44 +0530	[thread overview]
Message-ID: <20240417021747.2361382-2-anshuman.khandual@arm.com> (raw)
In-Reply-To: <20240417021747.2361382-1-anshuman.khandual@arm.com>

This adds register fields for MDSELR_EL1 as per the definitions based
on DDI0601 2024-03.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/tools/sysreg | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index a4c1dd4741a4..4c58fd7a70e6 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -93,6 +93,17 @@ Res0	63:32
 Field	31:0	DTRTX
 EndSysreg
 
+Sysreg	MDSELR_EL1	2	0	0	4	2
+Res0	63:6
+Enum	5:4	BANK
+	0b00	BANK_0
+	0b01	BANK_1
+	0b10	BANK_2
+	0b11	BANK_3
+EndEnum
+Res0	3:0
+EndSysreg
+
 Sysreg	OSECCR_EL1	2	0	0	6	2
 Res0	63:32
 Field	31:0	EDECCR
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Anshuman Khandual <anshuman.khandual@arm.com>
To: linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com
Cc: Anshuman Khandual <anshuman.khandual@arm.com>,
	Will Deacon <will@kernel.org>, Mark Brown <broonie@kernel.org>,
	linux-kernel@vger.kernel.org
Subject: [PATCH 1/4] arm64/sysreg: Add register fields for MDSELR_EL1
Date: Wed, 17 Apr 2024 07:47:44 +0530	[thread overview]
Message-ID: <20240417021747.2361382-2-anshuman.khandual@arm.com> (raw)
In-Reply-To: <20240417021747.2361382-1-anshuman.khandual@arm.com>

This adds register fields for MDSELR_EL1 as per the definitions based
on DDI0601 2024-03.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
 arch/arm64/tools/sysreg | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index a4c1dd4741a4..4c58fd7a70e6 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -93,6 +93,17 @@ Res0	63:32
 Field	31:0	DTRTX
 EndSysreg
 
+Sysreg	MDSELR_EL1	2	0	0	4	2
+Res0	63:6
+Enum	5:4	BANK
+	0b00	BANK_0
+	0b01	BANK_1
+	0b10	BANK_2
+	0b11	BANK_3
+EndEnum
+Res0	3:0
+EndSysreg
+
 Sysreg	OSECCR_EL1	2	0	0	6	2
 Res0	63:32
 Field	31:0	EDECCR
-- 
2.25.1


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  reply	other threads:[~2024-04-17  2:18 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-17  2:17 [PATCH 0/4] arm64/sysreg: Add registers for FEAT_Debugv8p9 Anshuman Khandual
2024-04-17  2:17 ` Anshuman Khandual [this message]
2024-04-17  2:17   ` [PATCH 1/4] arm64/sysreg: Add register fields for MDSELR_EL1 Anshuman Khandual
2024-04-17  2:17 ` [PATCH 2/4] arm64/sysreg: Add register fields for HDFGRTR2_EL2 Anshuman Khandual
2024-04-17  2:17   ` Anshuman Khandual
2024-04-17  2:17 ` [PATCH 3/4] arm64/sysreg: Add register fields for HDFGWTR2_EL2 Anshuman Khandual
2024-04-17  2:17   ` Anshuman Khandual
2024-04-17  2:17 ` [PATCH 4/4] arm64/sysreg: Update ID_AA64MMFR0_EL1 register Anshuman Khandual
2024-04-17  2:17   ` Anshuman Khandual
2024-04-29  1:56 ` [PATCH 0/4] arm64/sysreg: Add registers for FEAT_Debugv8p9 Anshuman Khandual
2024-04-30 12:27   ` Will Deacon
2024-04-30 12:38     ` Anshuman Khandual

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