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From: Shiyang Ruan <ruansy.fnst@fujitsu.com>
To: qemu-devel@nongnu.org, linux-cxl@vger.kernel.org
Cc: Jonathan.Cameron@huawei.com, dan.j.williams@intel.com,
	dave@stgolabs.net, ira.weiny@intel.com,
	alison.schofield@intel.com, stable@vger.kernel.org
Subject: [PATCH v3 1/2] cxl/core: correct length of DPA field masks
Date: Wed, 17 Apr 2024 15:50:52 +0800	[thread overview]
Message-ID: <20240417075053.3273543-2-ruansy.fnst@fujitsu.com> (raw)
In-Reply-To: <20240417075053.3273543-1-ruansy.fnst@fujitsu.com>

The length of Physical Address in General Media Event Record/DRAM Event
Record is 64-bit, so the field mask should be defined as such length.
Otherwise, this causes cxl_general_media and cxl_dram tracepoints to
mask off the upper-32-bits of DPA addresses. The cxl_poison event is
unaffected.

If userspace was doing its own DPA-to-HPA translation this could lead to
incorrect page retirement decisions, but there is no known consumer
(like rasdaemon) of this event today.

Fixes: d54a531a430b ("cxl/mem: Trace General Media Event Record")
Cc: <stable@vger.kernel.org>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Shiyang Ruan <ruansy.fnst@fujitsu.com>
---
 drivers/cxl/core/trace.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
index e5f13260fc52..cdfce932d5b1 100644
--- a/drivers/cxl/core/trace.h
+++ b/drivers/cxl/core/trace.h
@@ -253,7 +253,7 @@ TRACE_EVENT(cxl_generic_event,
  * DRAM Event Record
  * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44
  */
-#define CXL_DPA_FLAGS_MASK			0x3F
+#define CXL_DPA_FLAGS_MASK			0x3FULL
 #define CXL_DPA_MASK				(~CXL_DPA_FLAGS_MASK)
 
 #define CXL_DPA_VOLATILE			BIT(0)
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Shiyang Ruan via <qemu-devel@nongnu.org>
To: qemu-devel@nongnu.org, linux-cxl@vger.kernel.org
Cc: Jonathan.Cameron@huawei.com, dan.j.williams@intel.com,
	dave@stgolabs.net, ira.weiny@intel.com,
	alison.schofield@intel.com, stable@vger.kernel.org
Subject: [PATCH v3 1/2] cxl/core: correct length of DPA field masks
Date: Wed, 17 Apr 2024 15:50:52 +0800	[thread overview]
Message-ID: <20240417075053.3273543-2-ruansy.fnst@fujitsu.com> (raw)
In-Reply-To: <20240417075053.3273543-1-ruansy.fnst@fujitsu.com>

The length of Physical Address in General Media Event Record/DRAM Event
Record is 64-bit, so the field mask should be defined as such length.
Otherwise, this causes cxl_general_media and cxl_dram tracepoints to
mask off the upper-32-bits of DPA addresses. The cxl_poison event is
unaffected.

If userspace was doing its own DPA-to-HPA translation this could lead to
incorrect page retirement decisions, but there is no known consumer
(like rasdaemon) of this event today.

Fixes: d54a531a430b ("cxl/mem: Trace General Media Event Record")
Cc: <stable@vger.kernel.org>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Shiyang Ruan <ruansy.fnst@fujitsu.com>
---
 drivers/cxl/core/trace.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
index e5f13260fc52..cdfce932d5b1 100644
--- a/drivers/cxl/core/trace.h
+++ b/drivers/cxl/core/trace.h
@@ -253,7 +253,7 @@ TRACE_EVENT(cxl_generic_event,
  * DRAM Event Record
  * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44
  */
-#define CXL_DPA_FLAGS_MASK			0x3F
+#define CXL_DPA_FLAGS_MASK			0x3FULL
 #define CXL_DPA_MASK				(~CXL_DPA_FLAGS_MASK)
 
 #define CXL_DPA_VOLATILE			BIT(0)
-- 
2.34.1



  reply	other threads:[~2024-04-17  7:51 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-17  7:50 [PATCH v3 0/2] cxl: add poison creation event handler Shiyang Ruan
2024-04-17  7:50 ` Shiyang Ruan via
2024-04-17  7:50 ` Shiyang Ruan [this message]
2024-04-17  7:50   ` [PATCH v3 1/2] cxl/core: correct length of DPA field masks Shiyang Ruan via
2024-04-23 17:35   ` Ira Weiny
2024-04-23 17:35   ` Dan Williams
2024-04-23 17:42   ` Alison Schofield
2024-04-23 21:04     ` Ira Weiny
2024-04-25 10:05       ` Shiyang Ruan
2024-04-25 10:05         ` Shiyang Ruan via
2024-04-25 16:04         ` Ira Weiny
2024-04-30 21:00   ` Alison Schofield
2024-05-03 11:37     ` Shiyang Ruan via
2024-05-03 11:37       ` Shiyang Ruan
2024-04-17  7:50 ` [PATCH v3 2/2] cxl/core: add poison creation event handler Shiyang Ruan via
2024-04-17  7:50   ` Shiyang Ruan
2024-04-17 17:30   ` Dave Jiang
2024-04-18  9:01     ` Shiyang Ruan via
2024-04-18  9:01       ` Shiyang Ruan
2024-04-21 12:14   ` kernel test robot
2024-04-23 17:57   ` Ira Weiny
2024-05-03 10:42     ` Shiyang Ruan
2024-05-03 10:42       ` Shiyang Ruan via
2024-05-08 16:15       ` Jonathan Cameron
2024-05-08 16:15         ` Jonathan Cameron via
2024-04-23 18:40   ` Dan Williams
2024-05-03 11:32     ` Shiyang Ruan
2024-05-03 11:32       ` Shiyang Ruan via
2024-05-21  5:35       ` Shiyang Ruan
2024-05-21  5:35         ` Shiyang Ruan via

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