From: "Clément Léger" <cleger@rivosinc.com> To: Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Anup Patel <anup@brainfault.org>, Atish Patra <atishp@atishpatra.org> Cc: "Clément Léger" <cleger@rivosinc.com>, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, "Ved Shanbhogue" <ved@rivosinc.com> Subject: [RFC PATCH 6/7] riscv: kvm: add SBI FWFT support for SBI_FWFT_DOUBLE_TRAP_ENABLE Date: Thu, 18 Apr 2024 16:26:45 +0200 [thread overview] Message-ID: <20240418142701.1493091-7-cleger@rivosinc.com> (raw) In-Reply-To: <20240418142701.1493091-1-cleger@rivosinc.com> Add support in KVM SBI FWFT extension to allow VS-mode to request double trap enabling. Double traps can then be generated by VS-mode, allowing M-mode to redirect them to S-mode. Signed-off-by: Clément Léger <cleger@rivosinc.com> --- arch/riscv/include/asm/csr.h | 1 + arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h | 2 +- arch/riscv/kvm/vcpu_sbi_fwft.c | 41 ++++++++++++++++++++++ 3 files changed, 43 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 905cdf894a57..ee1b73655bec 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -196,6 +196,7 @@ /* xENVCFG flags */ #define ENVCFG_STCE (_AC(1, ULL) << 63) #define ENVCFG_PBMTE (_AC(1, ULL) << 62) +#define ENVCFG_DTE (_AC(1, ULL) << 59) #define ENVCFG_CBZE (_AC(1, UL) << 7) #define ENVCFG_CBCFE (_AC(1, UL) << 6) #define ENVCFG_CBIE_SHIFT 4 diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h b/arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h index 7dc1b80c7e6c..a9e20d655126 100644 --- a/arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h +++ b/arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h @@ -11,7 +11,7 @@ #include <asm/sbi.h> -#define KVM_SBI_FWFT_FEATURE_COUNT 1 +#define KVM_SBI_FWFT_FEATURE_COUNT 2 struct kvm_sbi_fwft_config; struct kvm_vcpu; diff --git a/arch/riscv/kvm/vcpu_sbi_fwft.c b/arch/riscv/kvm/vcpu_sbi_fwft.c index b9b7f8fa6d22..9e8e397eb02f 100644 --- a/arch/riscv/kvm/vcpu_sbi_fwft.c +++ b/arch/riscv/kvm/vcpu_sbi_fwft.c @@ -9,10 +9,19 @@ #include <linux/errno.h> #include <linux/err.h> #include <linux/kvm_host.h> +#include <linux/riscv_dbltrp.h> #include <asm/sbi.h> #include <asm/kvm_vcpu_sbi.h> #include <asm/kvm_vcpu_sbi_fwft.h> +#ifdef CONFIG_32BIT +# define CSR_HENVCFG_DBLTRP CSR_HENVCFGH +# define DBLTRP_DTE (ENVCFG_DTE >> 32) +#else +# define CSR_HENVCFG_DBLTRP CSR_HENVCFG +# define DBLTRP_DTE ENVCFG_DTE +#endif + #define MIS_DELEG (1UL << EXC_LOAD_MISALIGNED | 1UL << EXC_STORE_MISALIGNED) static int kvm_sbi_fwft_set_misaligned_delegation(struct kvm_vcpu *vcpu, @@ -36,6 +45,33 @@ static int kvm_sbi_fwft_get_misaligned_delegation(struct kvm_vcpu *vcpu, return SBI_SUCCESS; } +static int kvm_sbi_fwft_set_double_trap(struct kvm_vcpu *vcpu, + struct kvm_sbi_fwft_config *conf, + unsigned long value) +{ + if (!riscv_double_trap_enabled()) + return SBI_ERR_NOT_SUPPORTED; + + if (value) + csr_set(CSR_HENVCFG_DBLTRP, DBLTRP_DTE); + else + csr_clear(CSR_HENVCFG_DBLTRP, DBLTRP_DTE); + + return SBI_SUCCESS; +} + +static int kvm_sbi_fwft_get_double_trap(struct kvm_vcpu *vcpu, + struct kvm_sbi_fwft_config *conf, + unsigned long *value) +{ + if (!riscv_double_trap_enabled()) + return SBI_ERR_NOT_SUPPORTED; + + *value = (csr_read(CSR_HENVCFG_DBLTRP) & DBLTRP_DTE) != 0; + + return SBI_SUCCESS; +} + static struct kvm_sbi_fwft_config * kvm_sbi_fwft_get_config(struct kvm_vcpu *vcpu, enum sbi_fwft_feature_t feature) { @@ -111,6 +147,11 @@ static const struct kvm_sbi_fwft_feature features[] = { .id = SBI_FWFT_MISALIGNED_DELEG, .set = kvm_sbi_fwft_set_misaligned_delegation, .get = kvm_sbi_fwft_get_misaligned_delegation, + }, + { + .id = SBI_FWFT_DOUBLE_TRAP_ENABLE, + .set = kvm_sbi_fwft_set_double_trap, + .get = kvm_sbi_fwft_get_double_trap, } }; -- 2.43.0
WARNING: multiple messages have this Message-ID (diff)
From: "Clément Léger" <cleger@rivosinc.com> To: Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Anup Patel <anup@brainfault.org>, Atish Patra <atishp@atishpatra.org> Cc: "Clément Léger" <cleger@rivosinc.com>, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, "Ved Shanbhogue" <ved@rivosinc.com> Subject: [RFC PATCH 6/7] riscv: kvm: add SBI FWFT support for SBI_FWFT_DOUBLE_TRAP_ENABLE Date: Thu, 18 Apr 2024 16:26:45 +0200 [thread overview] Message-ID: <20240418142701.1493091-7-cleger@rivosinc.com> (raw) In-Reply-To: <20240418142701.1493091-1-cleger@rivosinc.com> Add support in KVM SBI FWFT extension to allow VS-mode to request double trap enabling. Double traps can then be generated by VS-mode, allowing M-mode to redirect them to S-mode. Signed-off-by: Clément Léger <cleger@rivosinc.com> --- arch/riscv/include/asm/csr.h | 1 + arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h | 2 +- arch/riscv/kvm/vcpu_sbi_fwft.c | 41 ++++++++++++++++++++++ 3 files changed, 43 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 905cdf894a57..ee1b73655bec 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -196,6 +196,7 @@ /* xENVCFG flags */ #define ENVCFG_STCE (_AC(1, ULL) << 63) #define ENVCFG_PBMTE (_AC(1, ULL) << 62) +#define ENVCFG_DTE (_AC(1, ULL) << 59) #define ENVCFG_CBZE (_AC(1, UL) << 7) #define ENVCFG_CBCFE (_AC(1, UL) << 6) #define ENVCFG_CBIE_SHIFT 4 diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h b/arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h index 7dc1b80c7e6c..a9e20d655126 100644 --- a/arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h +++ b/arch/riscv/include/asm/kvm_vcpu_sbi_fwft.h @@ -11,7 +11,7 @@ #include <asm/sbi.h> -#define KVM_SBI_FWFT_FEATURE_COUNT 1 +#define KVM_SBI_FWFT_FEATURE_COUNT 2 struct kvm_sbi_fwft_config; struct kvm_vcpu; diff --git a/arch/riscv/kvm/vcpu_sbi_fwft.c b/arch/riscv/kvm/vcpu_sbi_fwft.c index b9b7f8fa6d22..9e8e397eb02f 100644 --- a/arch/riscv/kvm/vcpu_sbi_fwft.c +++ b/arch/riscv/kvm/vcpu_sbi_fwft.c @@ -9,10 +9,19 @@ #include <linux/errno.h> #include <linux/err.h> #include <linux/kvm_host.h> +#include <linux/riscv_dbltrp.h> #include <asm/sbi.h> #include <asm/kvm_vcpu_sbi.h> #include <asm/kvm_vcpu_sbi_fwft.h> +#ifdef CONFIG_32BIT +# define CSR_HENVCFG_DBLTRP CSR_HENVCFGH +# define DBLTRP_DTE (ENVCFG_DTE >> 32) +#else +# define CSR_HENVCFG_DBLTRP CSR_HENVCFG +# define DBLTRP_DTE ENVCFG_DTE +#endif + #define MIS_DELEG (1UL << EXC_LOAD_MISALIGNED | 1UL << EXC_STORE_MISALIGNED) static int kvm_sbi_fwft_set_misaligned_delegation(struct kvm_vcpu *vcpu, @@ -36,6 +45,33 @@ static int kvm_sbi_fwft_get_misaligned_delegation(struct kvm_vcpu *vcpu, return SBI_SUCCESS; } +static int kvm_sbi_fwft_set_double_trap(struct kvm_vcpu *vcpu, + struct kvm_sbi_fwft_config *conf, + unsigned long value) +{ + if (!riscv_double_trap_enabled()) + return SBI_ERR_NOT_SUPPORTED; + + if (value) + csr_set(CSR_HENVCFG_DBLTRP, DBLTRP_DTE); + else + csr_clear(CSR_HENVCFG_DBLTRP, DBLTRP_DTE); + + return SBI_SUCCESS; +} + +static int kvm_sbi_fwft_get_double_trap(struct kvm_vcpu *vcpu, + struct kvm_sbi_fwft_config *conf, + unsigned long *value) +{ + if (!riscv_double_trap_enabled()) + return SBI_ERR_NOT_SUPPORTED; + + *value = (csr_read(CSR_HENVCFG_DBLTRP) & DBLTRP_DTE) != 0; + + return SBI_SUCCESS; +} + static struct kvm_sbi_fwft_config * kvm_sbi_fwft_get_config(struct kvm_vcpu *vcpu, enum sbi_fwft_feature_t feature) { @@ -111,6 +147,11 @@ static const struct kvm_sbi_fwft_feature features[] = { .id = SBI_FWFT_MISALIGNED_DELEG, .set = kvm_sbi_fwft_set_misaligned_delegation, .get = kvm_sbi_fwft_get_misaligned_delegation, + }, + { + .id = SBI_FWFT_DOUBLE_TRAP_ENABLE, + .set = kvm_sbi_fwft_set_double_trap, + .get = kvm_sbi_fwft_get_double_trap, } }; -- 2.43.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2024-04-18 14:27 UTC|newest] Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-04-18 14:26 [RFC PATCH 0/7] riscv: Add support for Ssdbltrp extension Clément Léger 2024-04-18 14:26 ` Clément Léger 2024-04-18 14:26 ` [RFC PATCH 1/7] riscv: kvm: add support for FWFT SBI extension Clément Léger 2024-04-18 14:26 ` Clément Léger 2024-04-26 23:44 ` Deepak Gupta 2024-04-26 23:44 ` Deepak Gupta 2024-04-30 7:26 ` Clément Léger 2024-04-30 7:26 ` Clément Léger 2024-04-18 14:26 ` [RFC PATCH 2/7] dt-bindings: riscv: add Ssdbltrp ISA extension description Clément Léger 2024-04-18 14:26 ` Clément Léger 2024-04-23 16:30 ` Conor Dooley 2024-04-23 16:30 ` Conor Dooley 2024-04-24 7:20 ` Clément Léger 2024-04-24 7:20 ` Clément Léger 2024-04-24 7:40 ` Conor Dooley 2024-04-24 7:40 ` Conor Dooley 2024-04-24 21:38 ` Ved Shanbhogue 2024-04-24 21:38 ` Ved Shanbhogue 2024-04-18 14:26 ` [RFC PATCH 3/7] riscv: add Ssdbltrp ISA extension parsing Clément Léger 2024-04-18 14:26 ` Clément Léger 2024-04-18 14:26 ` [RFC PATCH 4/7] riscv: handle Ssdbltrp mstatus SDT bit Clément Léger 2024-04-18 14:26 ` Clément Léger 2024-04-18 14:26 ` [RFC PATCH 5/7] riscv: add double trap driver Clément Léger 2024-04-18 14:26 ` Clément Léger 2024-04-23 16:39 ` Conor Dooley 2024-04-23 16:39 ` Conor Dooley 2024-04-24 8:56 ` Clément Léger 2024-04-24 8:56 ` Clément Léger 2024-04-26 23:59 ` Deepak Gupta 2024-04-26 23:59 ` Deepak Gupta 2024-05-14 8:06 ` Clément Léger 2024-05-14 8:06 ` Clément Léger 2024-05-14 14:38 ` Deepak Gupta 2024-05-14 14:38 ` Deepak Gupta 2024-04-18 14:26 ` Clément Léger [this message] 2024-04-18 14:26 ` [RFC PATCH 6/7] riscv: kvm: add SBI FWFT support for SBI_FWFT_DOUBLE_TRAP_ENABLE Clément Léger 2024-04-27 1:17 ` Deepak Gupta 2024-04-27 1:17 ` Deepak Gupta 2024-04-27 15:36 ` Deepak Gupta 2024-04-27 15:36 ` Deepak Gupta 2024-05-14 9:43 ` Clément Léger 2024-05-14 9:43 ` Clément Léger 2024-05-14 16:05 ` Deepak Gupta 2024-05-14 16:05 ` Deepak Gupta 2024-04-18 14:26 ` [RFC PATCH 7/7] RISC-V: KVM: add support for double trap exception Clément Léger 2024-04-18 14:26 ` Clément Léger 2024-04-27 1:33 ` Deepak Gupta 2024-04-27 1:33 ` Deepak Gupta 2024-04-30 15:35 ` Clément Léger 2024-04-30 15:35 ` Clément Léger 2024-04-23 16:24 ` [RFC PATCH 0/7] riscv: Add support for Ssdbltrp extension Conor Dooley 2024-04-23 16:24 ` Conor Dooley 2024-04-24 7:23 ` Clément Léger 2024-04-24 7:23 ` Clément Léger
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