From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: Stefano Stabellini <sstabellini@kernel.org>,
Julien Grall <julien@xen.org>
Subject: [PATCH v2] Arm32: MSR to SPSR needs qualification
Date: Fri, 11 Jun 2021 15:04:24 +0200 [thread overview]
Message-ID: <2d0ac238-bf23-51ed-9ccf-6fd65fc6eec4@suse.com> (raw)
The Arm ARM's description of MSR (ARM DDI 0406C.d section B9.3.12)
doesn't even allow for plain "SPSR" here, and while gas accepts this, it
takes it to mean SPSR_cf. Yet surely all of SPSR wants updating on this
path, not just the lowest and highest 8 bits.
Fixes: dfcffb128be4 ("xen/arm32: SPSR_hyp/SPSR")
Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
v2: Add doc ref.
--- a/xen/arch/arm/arm32/entry.S
+++ b/xen/arch/arm/arm32/entry.S
@@ -395,7 +395,7 @@ return_to_hypervisor:
ldr r11, [sp, #UREGS_pc]
msr ELR_hyp, r11
ldr r11, [sp, #UREGS_cpsr]
- msr SPSR, r11
+ msr SPSR_cxsf, r11
#ifdef CONFIG_ARM32_HARDEN_BRANCH_PREDICTOR
/*
* Hardening branch predictor may require to setup a different
next reply other threads:[~2021-06-11 13:04 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-11 13:04 Jan Beulich [this message]
2021-06-11 22:04 ` [PATCH v2] Arm32: MSR to SPSR needs qualification Stefano Stabellini
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