From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> To: "Thomas Gleixner" <tglx@linutronix.de>, "Jason Cooper" <jason@lakedaemon.net>, "Marc Zyngier" <maz@kernel.org>, "Rob Herring" <robh+dt@kernel.org>, "Andreas Färber" <afaerber@suse.de>, "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org> Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org Subject: [PATCH v4 1/3] dt-bindings: interrupt-controller: Add Actions SIRQ controller binding Date: Sun, 16 Aug 2020 14:33:54 +0300 [thread overview] Message-ID: <2dfc51680d37eea74374a130e7c9bc40e06b1b0e.1597571397.git.cristian.ciocaltea@gmail.com> (raw) In-Reply-To: <cover.1597571397.git.cristian.ciocaltea@gmail.com> Actions Semi Owl SoCs SIRQ interrupt controller is found in S500, S700 and S900 SoCs and provides support for connecting up to 3 independent external interrupt controllers through dedicated SIRQ pins. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> --- .../actions,owl-sirq.yaml | 69 +++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml new file mode 100644 index 000000000000..b9903f9d7449 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/actions,owl-sirq.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi Owl SoCs SIRQ interrupt controller + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Cristian Ciocaltea <cristian.ciocaltea@gmail.com> + +description: | + This interrupt controller is found in the Actions Semi Owl SoCs (S500, S700 + and S900) and provides support for connecting up to 3 independent external + interrupt controllers through SIRQ0, SIRQ1 and SIRQ2 pins. + +properties: + compatible: + oneOf: + - items: + - enum: + - actions,s500-sirq + - actions,s700-sirq + - actions,s900-sirq + - const: actions,owl-sirq + - const: actions,owl-sirq + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + description: + The first cell is the input IRQ number, between 0 and 2, while the second + cell is the trigger type as defined in interrupt.txt in this directory. + + 'actions,ext-interrupts': + description: | + Contains the GIC SPI IRQ numbers mapped to the external interrupt + lines. They shall be specified sequentially from output 0 to 2. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 3 + maxItems: 3 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - 'actions,ext-interrupts' + +additionalProperties: false + +examples: + - | + sirq: interrupt-controller@b01b0200 { + compatible = "actions,s500-sirq", "actions,owl-sirq"; + reg = <0xb01b0200 0x4>; + interrupt-controller; + #interrupt-cells = <2>; + actions,ext-interrupts = <13>, /* SIRQ0 */ + <14>, /* SIRQ1 */ + <15>; /* SIRQ2 */ + }; + +... -- 2.28.0
WARNING: multiple messages have this Message-ID (diff)
From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> To: "Thomas Gleixner" <tglx@linutronix.de>, "Jason Cooper" <jason@lakedaemon.net>, "Marc Zyngier" <maz@kernel.org>, "Rob Herring" <robh+dt@kernel.org>, "Andreas Färber" <afaerber@suse.de>, "Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org> Cc: devicetree@vger.kernel.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 1/3] dt-bindings: interrupt-controller: Add Actions SIRQ controller binding Date: Sun, 16 Aug 2020 14:33:54 +0300 [thread overview] Message-ID: <2dfc51680d37eea74374a130e7c9bc40e06b1b0e.1597571397.git.cristian.ciocaltea@gmail.com> (raw) In-Reply-To: <cover.1597571397.git.cristian.ciocaltea@gmail.com> Actions Semi Owl SoCs SIRQ interrupt controller is found in S500, S700 and S900 SoCs and provides support for connecting up to 3 independent external interrupt controllers through dedicated SIRQ pins. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> --- .../actions,owl-sirq.yaml | 69 +++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml new file mode 100644 index 000000000000..b9903f9d7449 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/actions,owl-sirq.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi Owl SoCs SIRQ interrupt controller + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + - Cristian Ciocaltea <cristian.ciocaltea@gmail.com> + +description: | + This interrupt controller is found in the Actions Semi Owl SoCs (S500, S700 + and S900) and provides support for connecting up to 3 independent external + interrupt controllers through SIRQ0, SIRQ1 and SIRQ2 pins. + +properties: + compatible: + oneOf: + - items: + - enum: + - actions,s500-sirq + - actions,s700-sirq + - actions,s900-sirq + - const: actions,owl-sirq + - const: actions,owl-sirq + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + description: + The first cell is the input IRQ number, between 0 and 2, while the second + cell is the trigger type as defined in interrupt.txt in this directory. + + 'actions,ext-interrupts': + description: | + Contains the GIC SPI IRQ numbers mapped to the external interrupt + lines. They shall be specified sequentially from output 0 to 2. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 3 + maxItems: 3 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - 'actions,ext-interrupts' + +additionalProperties: false + +examples: + - | + sirq: interrupt-controller@b01b0200 { + compatible = "actions,s500-sirq", "actions,owl-sirq"; + reg = <0xb01b0200 0x4>; + interrupt-controller; + #interrupt-cells = <2>; + actions,ext-interrupts = <13>, /* SIRQ0 */ + <14>, /* SIRQ1 */ + <15>; /* SIRQ2 */ + }; + +... -- 2.28.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-08-16 11:38 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-08-16 11:33 [PATCH v4 0/3] Add Actions Semi Owl family sirq support Cristian Ciocaltea 2020-08-16 11:33 ` Cristian Ciocaltea 2020-08-16 11:33 ` Cristian Ciocaltea [this message] 2020-08-16 11:33 ` [PATCH v4 1/3] dt-bindings: interrupt-controller: Add Actions SIRQ controller binding Cristian Ciocaltea 2020-08-16 11:33 ` [PATCH v4 2/3] irqchip: Add Actions Semi Owl SIRQ controller Cristian Ciocaltea 2020-08-16 11:33 ` Cristian Ciocaltea 2020-08-17 13:52 ` Marc Zyngier 2020-08-17 13:52 ` Marc Zyngier 2020-08-18 17:42 ` Cristian Ciocaltea 2020-08-18 17:42 ` Cristian Ciocaltea 2020-08-18 20:48 ` Marc Zyngier 2020-08-18 20:48 ` Marc Zyngier 2020-08-19 16:52 ` Cristian Ciocaltea 2020-08-19 16:52 ` Cristian Ciocaltea 2020-08-16 11:33 ` [PATCH v4 3/3] MAINTAINERS: Add entries for " Cristian Ciocaltea 2020-08-16 11:33 ` Cristian Ciocaltea
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