From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com
Subject: [Intel-gfx] [PATCH v2 08/11] drm/i915/display: rename dev_priv -> i915 in crtc state dump
Date: Thu, 16 Jun 2022 12:48:18 +0300 [thread overview]
Message-ID: <3c1dafd45757d2de2e3f8404674168f2b1241170.1655372759.git.jani.nikula@intel.com> (raw)
In-Reply-To: <cover.1655372759.git.jani.nikula@intel.com>
Rename dev_priv to i915 in crtc state dumping code.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
.../drm/i915/display/intel_crtc_state_dump.c | 80 +++++++++----------
1 file changed, 40 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index 35c627721199..4ca6e9493ff2 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -37,23 +37,23 @@ intel_dump_m_n_config(const struct intel_crtc_state *pipe_config,
}
static void
-intel_dump_infoframe(struct drm_i915_private *dev_priv,
+intel_dump_infoframe(struct drm_i915_private *i915,
const union hdmi_infoframe *frame)
{
if (!drm_debug_enabled(DRM_UT_KMS))
return;
- hdmi_infoframe_log(KERN_DEBUG, dev_priv->drm.dev, frame);
+ hdmi_infoframe_log(KERN_DEBUG, i915->drm.dev, frame);
}
static void
-intel_dump_dp_vsc_sdp(struct drm_i915_private *dev_priv,
+intel_dump_dp_vsc_sdp(struct drm_i915_private *i915,
const struct drm_dp_vsc_sdp *vsc)
{
if (!drm_debug_enabled(DRM_UT_KMS))
return;
- drm_dp_vsc_sdp_log(KERN_DEBUG, dev_priv->drm.dev, vsc);
+ drm_dp_vsc_sdp_log(KERN_DEBUG, i915->drm.dev, vsc);
}
#define OUTPUT_TYPE(x) [INTEL_OUTPUT_ ## x] = #x
@@ -148,13 +148,13 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
const char *context)
{
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct drm_i915_private *i915 = to_i915(crtc->base.dev);
const struct intel_plane_state *plane_state;
struct intel_plane *plane;
char buf[64];
int i;
- drm_dbg_kms(&dev_priv->drm, "[CRTC:%d:%s] enable: %s [%s]\n",
+ drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] enable: %s [%s]\n",
crtc->base.base.id, crtc->base.name,
str_yes_no(pipe_config->hw.enable), context);
@@ -162,31 +162,31 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
goto dump_planes;
snprintf_output_types(buf, sizeof(buf), pipe_config->output_types);
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(&i915->drm,
"active: %s, output_types: %s (0x%x), output format: %s\n",
str_yes_no(pipe_config->hw.active),
buf, pipe_config->output_types,
output_formats(pipe_config->output_format));
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(&i915->drm,
"cpu_transcoder: %s, pipe bpp: %i, dithering: %i\n",
transcoder_name(pipe_config->cpu_transcoder),
pipe_config->pipe_bpp, pipe_config->dither);
- drm_dbg_kms(&dev_priv->drm, "MST master transcoder: %s\n",
+ drm_dbg_kms(&i915->drm, "MST master transcoder: %s\n",
transcoder_name(pipe_config->mst_master_transcoder));
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(&i915->drm,
"port sync: master transcoder: %s, slave transcoder bitmask = 0x%x\n",
transcoder_name(pipe_config->master_transcoder),
pipe_config->sync_mode_slaves_mask);
- drm_dbg_kms(&dev_priv->drm, "bigjoiner: %s, pipes: 0x%x\n",
+ drm_dbg_kms(&i915->drm, "bigjoiner: %s, pipes: 0x%x\n",
intel_crtc_is_bigjoiner_slave(pipe_config) ? "slave" :
intel_crtc_is_bigjoiner_master(pipe_config) ? "master" : "no",
pipe_config->bigjoiner_pipes);
- drm_dbg_kms(&dev_priv->drm, "splitter: %s, link count %d, overlap %d\n",
+ drm_dbg_kms(&i915->drm, "splitter: %s, link count %d, overlap %d\n",
str_enabled_disabled(pipe_config->splitter.enable),
pipe_config->splitter.link_count,
pipe_config->splitter.pixel_overlap);
@@ -205,38 +205,38 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
&pipe_config->dp_m2_n2);
}
- drm_dbg_kms(&dev_priv->drm, "framestart delay: %d, MSA timing delay: %d\n",
+ drm_dbg_kms(&i915->drm, "framestart delay: %d, MSA timing delay: %d\n",
pipe_config->framestart_delay, pipe_config->msa_timing_delay);
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(&i915->drm,
"audio: %i, infoframes: %i, infoframes enabled: 0x%x\n",
pipe_config->has_audio, pipe_config->has_infoframe,
pipe_config->infoframes.enable);
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GENERAL_CONTROL))
- drm_dbg_kms(&dev_priv->drm, "GCP: 0x%x\n",
+ drm_dbg_kms(&i915->drm, "GCP: 0x%x\n",
pipe_config->infoframes.gcp);
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI))
- intel_dump_infoframe(dev_priv, &pipe_config->infoframes.avi);
+ intel_dump_infoframe(i915, &pipe_config->infoframes.avi);
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_SPD))
- intel_dump_infoframe(dev_priv, &pipe_config->infoframes.spd);
+ intel_dump_infoframe(i915, &pipe_config->infoframes.spd);
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_VENDOR))
- intel_dump_infoframe(dev_priv, &pipe_config->infoframes.hdmi);
+ intel_dump_infoframe(i915, &pipe_config->infoframes.hdmi);
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_DRM))
- intel_dump_infoframe(dev_priv, &pipe_config->infoframes.drm);
+ intel_dump_infoframe(i915, &pipe_config->infoframes.drm);
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA))
- intel_dump_infoframe(dev_priv, &pipe_config->infoframes.drm);
+ intel_dump_infoframe(i915, &pipe_config->infoframes.drm);
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(DP_SDP_VSC))
- intel_dump_dp_vsc_sdp(dev_priv, &pipe_config->infoframes.vsc);
+ intel_dump_dp_vsc_sdp(i915, &pipe_config->infoframes.vsc);
- drm_dbg_kms(&dev_priv->drm, "vrr: %s, vmin: %d, vmax: %d, pipeline full: %d, guardband: %d flipline: %d, vmin vblank: %d, vmax vblank: %d\n",
+ drm_dbg_kms(&i915->drm, "vrr: %s, vmin: %d, vmax: %d, pipeline full: %d, guardband: %d flipline: %d, vmin vblank: %d, vmax vblank: %d\n",
str_yes_no(pipe_config->vrr.enable),
pipe_config->vrr.vmin, pipe_config->vrr.vmax,
pipe_config->vrr.pipeline_full, pipe_config->vrr.guardband,
@@ -244,60 +244,60 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
intel_vrr_vmin_vblank_start(pipe_config),
intel_vrr_vmax_vblank_start(pipe_config));
- drm_dbg_kms(&dev_priv->drm, "requested mode: " DRM_MODE_FMT "\n",
+ drm_dbg_kms(&i915->drm, "requested mode: " DRM_MODE_FMT "\n",
DRM_MODE_ARG(&pipe_config->hw.mode));
- drm_dbg_kms(&dev_priv->drm, "adjusted mode: " DRM_MODE_FMT "\n",
+ drm_dbg_kms(&i915->drm, "adjusted mode: " DRM_MODE_FMT "\n",
DRM_MODE_ARG(&pipe_config->hw.adjusted_mode));
- intel_dump_crtc_timings(dev_priv, &pipe_config->hw.adjusted_mode);
- drm_dbg_kms(&dev_priv->drm, "pipe mode: " DRM_MODE_FMT "\n",
+ intel_dump_crtc_timings(i915, &pipe_config->hw.adjusted_mode);
+ drm_dbg_kms(&i915->drm, "pipe mode: " DRM_MODE_FMT "\n",
DRM_MODE_ARG(&pipe_config->hw.pipe_mode));
- intel_dump_crtc_timings(dev_priv, &pipe_config->hw.pipe_mode);
- drm_dbg_kms(&dev_priv->drm,
+ intel_dump_crtc_timings(i915, &pipe_config->hw.pipe_mode);
+ drm_dbg_kms(&i915->drm,
"port clock: %d, pipe src: " DRM_RECT_FMT ", pixel rate %d\n",
pipe_config->port_clock, DRM_RECT_ARG(&pipe_config->pipe_src),
pipe_config->pixel_rate);
- drm_dbg_kms(&dev_priv->drm, "linetime: %d, ips linetime: %d\n",
+ drm_dbg_kms(&i915->drm, "linetime: %d, ips linetime: %d\n",
pipe_config->linetime, pipe_config->ips_linetime);
- if (DISPLAY_VER(dev_priv) >= 9)
- drm_dbg_kms(&dev_priv->drm,
+ if (DISPLAY_VER(i915) >= 9)
+ drm_dbg_kms(&i915->drm,
"num_scalers: %d, scaler_users: 0x%x, scaler_id: %d\n",
crtc->num_scalers,
pipe_config->scaler_state.scaler_users,
pipe_config->scaler_state.scaler_id);
- if (HAS_GMCH(dev_priv))
- drm_dbg_kms(&dev_priv->drm,
+ if (HAS_GMCH(i915))
+ drm_dbg_kms(&i915->drm,
"gmch pfit: control: 0x%08x, ratios: 0x%08x, lvds border: 0x%08x\n",
pipe_config->gmch_pfit.control,
pipe_config->gmch_pfit.pgm_ratios,
pipe_config->gmch_pfit.lvds_border_bits);
else
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(&i915->drm,
"pch pfit: " DRM_RECT_FMT ", %s, force thru: %s\n",
DRM_RECT_ARG(&pipe_config->pch_pfit.dst),
str_enabled_disabled(pipe_config->pch_pfit.enabled),
str_yes_no(pipe_config->pch_pfit.force_thru));
- drm_dbg_kms(&dev_priv->drm, "ips: %i, double wide: %i, drrs: %i\n",
+ drm_dbg_kms(&i915->drm, "ips: %i, double wide: %i, drrs: %i\n",
pipe_config->ips_enabled, pipe_config->double_wide,
pipe_config->has_drrs);
- intel_dpll_dump_hw_state(dev_priv, &pipe_config->dpll_hw_state);
+ intel_dpll_dump_hw_state(i915, &pipe_config->dpll_hw_state);
- if (IS_CHERRYVIEW(dev_priv))
- drm_dbg_kms(&dev_priv->drm,
+ if (IS_CHERRYVIEW(i915))
+ drm_dbg_kms(&i915->drm,
"cgm_mode: 0x%x gamma_mode: 0x%x gamma_enable: %d csc_enable: %d\n",
pipe_config->cgm_mode, pipe_config->gamma_mode,
pipe_config->gamma_enable, pipe_config->csc_enable);
else
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(&i915->drm,
"csc_mode: 0x%x gamma_mode: 0x%x gamma_enable: %d csc_enable: %d\n",
pipe_config->csc_mode, pipe_config->gamma_mode,
pipe_config->gamma_enable, pipe_config->csc_enable);
- drm_dbg_kms(&dev_priv->drm, "degamma lut: %d entries, gamma lut: %d entries\n",
+ drm_dbg_kms(&i915->drm, "degamma lut: %d entries, gamma lut: %d entries\n",
pipe_config->hw.degamma_lut ?
drm_color_lut_size(pipe_config->hw.degamma_lut) : 0,
pipe_config->hw.gamma_lut ?
--
2.30.2
next prev parent reply other threads:[~2022-06-16 9:49 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-16 9:48 [Intel-gfx] [PATCH v2 00/11] drm/i915: drm/i915/display: split out verification, hw readout and dump from intel_display.c Jani Nikula
2022-06-16 9:48 ` [Intel-gfx] [PATCH v2 01/11] drm/i915/wm: move wm state verification to intel_pm.c Jani Nikula
2022-06-16 9:48 ` [Intel-gfx] [PATCH v2 02/11] drm/i915/dpll: move shared dpll state verification to intel_dpll_mgr.c Jani Nikula
2022-06-16 9:48 ` [Intel-gfx] [PATCH v2 03/11] drm/i915/mpllb: use I915_STATE_WARN() for state mismatch warnings Jani Nikula
2022-06-16 9:48 ` [Intel-gfx] [PATCH v2 04/11] drm/i915/mpllb: move mpllb state check to intel_snps_phy.c Jani Nikula
2022-06-16 9:48 ` [Intel-gfx] [PATCH v2 05/11] drm/i915/display: split out modeset verification code Jani Nikula
2022-06-16 9:48 ` [Intel-gfx] [PATCH v2 06/11] drm/i915/display: split out crtc state dump to a separate file Jani Nikula
2022-06-16 9:48 ` [Intel-gfx] [PATCH v2 07/11] drm/i915/display: change who adds [] around crtc state dump context string Jani Nikula
2022-06-16 9:48 ` Jani Nikula [this message]
2022-06-16 9:48 ` [Intel-gfx] [PATCH v2 09/11] drm/i915/display: split out hw state readout and sanitize Jani Nikula
2022-06-16 9:48 ` [Intel-gfx] [PATCH v2 10/11] drm/i915/display: some struct drm_i915_private *i915 conversions Jani Nikula
2022-06-16 9:48 ` [Intel-gfx] [PATCH v2 11/11] drm/i915/display: convert modeset setup to struct drm_i915_private *i915 Jani Nikula
2022-06-16 10:02 ` [Intel-gfx] [PATCH v2 00/11] drm/i915: drm/i915/display: split out verification, hw readout and dump from intel_display.c Ville Syrjälä
2022-06-17 8:57 ` Jani Nikula
2022-06-16 13:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2022-06-16 13:03 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-06-16 13:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-06-16 18:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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