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From: Vineeth Pillai <viremana@linux.microsoft.com>
To: Lan Tianyu <Tianyu.Lan@microsoft.com>,
	Michael Kelley <mikelley@microsoft.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Sean Christopherson <seanjc@google.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	Wanpeng Li <wanpengli@tencent.com>,
	Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
	Wei Liu <wei.liu@kernel.org>,
	Stephen Hemminger <sthemmin@microsoft.com>,
	Haiyang Zhang <haiyangz@microsoft.com>
Cc: Vineeth Pillai <viremana@linux.microsoft.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	"K. Y. Srinivasan" <kys@microsoft.com>,
	x86@kernel.org, kvm@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org
Subject: [PATCH v2 2/7] hyperv: SVM enlightened TLB flush support flag
Date: Thu, 15 Apr 2021 13:43:37 +0000	[thread overview]
Message-ID: <3fd0cdfb9a4164a3fb90351db4dc10f52a7c4819.1618492553.git.viremana@linux.microsoft.com> (raw)
In-Reply-To: <cover.1618492553.git.viremana@linux.microsoft.com>

Bit 22 of HYPERV_CPUID_FEATURES.EDX is specific to SVM and specifies
support for enlightened TLB flush. With this enlightenment enabled,
ASID invalidations flushes only gva->hpa entries. To flush TLB entries
derived from NPT, hypercalls should be used
(HvFlushGuestPhysicalAddressSpace or HvFlushGuestPhysicalAddressList)

Signed-off-by: Vineeth Pillai <viremana@linux.microsoft.com>
---
 arch/x86/include/asm/hyperv-tlfs.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/x86/include/asm/hyperv-tlfs.h b/arch/x86/include/asm/hyperv-tlfs.h
index 606f5cc579b2..005bf14d0449 100644
--- a/arch/x86/include/asm/hyperv-tlfs.h
+++ b/arch/x86/include/asm/hyperv-tlfs.h
@@ -133,6 +133,15 @@
 #define HV_X64_NESTED_GUEST_MAPPING_FLUSH		BIT(18)
 #define HV_X64_NESTED_MSR_BITMAP			BIT(19)
 
+/*
+ * This is specific to AMD and specifies that enlightened TLB flush is
+ * supported. If guest opts in to this feature, ASID invalidations only
+ * flushes gva -> hpa mapping entries. To flush the TLB entries derived
+ * from NPT, hypercalls should be used (HvFlushGuestPhysicalAddressSpace
+ * or HvFlushGuestPhysicalAddressList).
+ */
+#define HV_X64_NESTED_ENLIGHTENED_TLB			BIT(22)
+
 /* HYPERV_CPUID_ISOLATION_CONFIG.EAX bits. */
 #define HV_PARAVISOR_PRESENT				BIT(0)
 
-- 
2.25.1


  parent reply	other threads:[~2021-04-15 13:44 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-15 13:43 [PATCH v2 0/7] Hyper-V nested virt enlightenments for SVM Vineeth Pillai
2021-04-15 13:43 ` [PATCH v2 1/7] hyperv: Detect Nested virtualization support " Vineeth Pillai
2021-04-16  8:26   ` Vitaly Kuznetsov
2021-04-16 16:10     ` Vineeth Pillai
2021-04-15 13:43 ` Vineeth Pillai [this message]
2021-04-21 10:00   ` [PATCH v2 2/7] hyperv: SVM enlightened TLB flush support flag Wei Liu
2021-04-21 11:15     ` Vineeth Pillai
2021-04-21 13:20       ` Wei Liu
2021-04-15 13:43 ` [PATCH v2 3/7] KVM: x86: hyper-v: Move the remote TLB flush logic out of vmx Vineeth Pillai
2021-04-16  8:36   ` Vitaly Kuznetsov
2021-04-16  8:40     ` Paolo Bonzini
2021-04-16 16:39     ` Vineeth Pillai
2021-04-20 15:57       ` Vitaly Kuznetsov
2021-04-15 13:43 ` [PATCH v2 4/7] KVM: SVM: hyper-v: Nested enlightenments in VMCB Vineeth Pillai
2021-04-16  8:58   ` Vitaly Kuznetsov
2021-04-16 17:07     ` Vineeth Pillai
2021-04-15 13:43 ` [PATCH v2 5/7] KVM: SVM: hyper-v: Remote TLB flush for SVM Vineeth Pillai
2021-04-16  9:04   ` Vitaly Kuznetsov
2021-04-16 17:26     ` Vineeth Pillai
2021-04-21 14:03       ` Vineeth Pillai
2021-04-15 13:43 ` [PATCH v2 6/7] KVM: SVM: hyper-v: Enlightened MSR-Bitmap support Vineeth Pillai
2021-04-15 13:43 ` [PATCH v2 7/7] KVM: SVM: hyper-v: Direct Virtual Flush support Vineeth Pillai

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