From: Simon Horman <horms+renesas@verge.net.au> To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm <magnus.damm@gmail.com>, Pooya Keshavarzi <Pooya.Keshavarzi@de.bosch.com>, Dirk Behme <dirk.behme@de.bosch.com>, Simon Horman <horms+renesas@verge.net.au> Subject: [PATCH 2/9] arm64: dts: r8a7795: Increase the size of GIC-400 mapped registers Date: Wed, 8 Jun 2016 09:59:39 +0900 [thread overview] Message-ID: <457f47b7651ccb1828c1d02f7ace0d07e9b16f33.1465347183.git.horms+renesas@verge.net.au> (raw) In-Reply-To: <cover.1465347183.git.horms+renesas@verge.net.au> From: Pooya Keshavarzi <Pooya.Keshavarzi@de.bosch.com> There are some requirements about the GIC-400 memory layout and its mapping if using 64k aligned base addresses like on r8a7795. See e.g. http://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=21550029f709072aacf3b9 Map the whole memory range instead of only 0x2000. This will fix the issue that some hypervisors, e.g. Xen, fail to handle the interrupts correctly. Signed-off-by: Pooya Keshavarzi <Pooya.Keshavarzi@de.bosch.com> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 3285a9286786..de3e799a7bba 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -157,9 +157,9 @@ #address-cells = <0>; interrupt-controller; reg = <0x0 0xf1010000 0 0x1000>, - <0x0 0xf1020000 0 0x2000>, + <0x0 0xf1020000 0 0x20000>, <0x0 0xf1040000 0 0x20000>, - <0x0 0xf1060000 0 0x2000>; + <0x0 0xf1060000 0 0x20000>; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; -- 2.1.4
WARNING: multiple messages have this Message-ID (diff)
From: horms+renesas@verge.net.au (Simon Horman) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/9] arm64: dts: r8a7795: Increase the size of GIC-400 mapped registers Date: Wed, 8 Jun 2016 09:59:39 +0900 [thread overview] Message-ID: <457f47b7651ccb1828c1d02f7ace0d07e9b16f33.1465347183.git.horms+renesas@verge.net.au> (raw) In-Reply-To: <cover.1465347183.git.horms+renesas@verge.net.au> From: Pooya Keshavarzi <Pooya.Keshavarzi@de.bosch.com> There are some requirements about the GIC-400 memory layout and its mapping if using 64k aligned base addresses like on r8a7795. See e.g. http://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=21550029f709072aacf3b9 Map the whole memory range instead of only 0x2000. This will fix the issue that some hypervisors, e.g. Xen, fail to handle the interrupts correctly. Signed-off-by: Pooya Keshavarzi <Pooya.Keshavarzi@de.bosch.com> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 3285a9286786..de3e799a7bba 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -157,9 +157,9 @@ #address-cells = <0>; interrupt-controller; reg = <0x0 0xf1010000 0 0x1000>, - <0x0 0xf1020000 0 0x2000>, + <0x0 0xf1020000 0 0x20000>, <0x0 0xf1040000 0 0x20000>, - <0x0 0xf1060000 0 0x2000>; + <0x0 0xf1060000 0 0x20000>; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; -- 2.1.4
next prev parent reply other threads:[~2016-06-08 0:59 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-06-08 0:59 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.8 Simon Horman 2016-06-08 0:59 ` Simon Horman 2016-06-08 0:59 ` [PATCH 1/9] arm64: dts: salvator-x: SCIF1 supports RTS/CTS hardware flow control Simon Horman 2016-06-08 0:59 ` Simon Horman 2016-06-08 0:59 ` Simon Horman [this message] 2016-06-08 0:59 ` [PATCH 2/9] arm64: dts: r8a7795: Increase the size of GIC-400 mapped registers Simon Horman 2016-06-08 0:59 ` [PATCH 3/9] arm64: dts: r8a7795: enable DMA for I2C Simon Horman 2016-06-08 0:59 ` Simon Horman 2016-06-08 0:59 ` [PATCH 4/9] arm64: dts: r8a7795: Add RWDT node Simon Horman 2016-06-08 0:59 ` Simon Horman 2016-06-08 0:59 ` [PATCH 5/9] arm64: dts: salvator-x: Enable watchdog timer Simon Horman 2016-06-08 0:59 ` Simon Horman 2016-06-08 0:59 ` [PATCH 6/9] arm64: dts: r8a7795: Use SYSC "always-on" PM Domain for RWDT node Simon Horman 2016-06-08 0:59 ` Simon Horman 2016-06-08 0:59 ` [PATCH 7/9] arm64: dts: r8a7795: Fix W=1 dtc warnings Simon Horman 2016-06-08 0:59 ` Simon Horman 2016-06-08 0:59 ` [PATCH 8/9] arm64: dts: salvator-x: " Simon Horman 2016-06-08 0:59 ` Simon Horman 2016-06-08 0:59 ` [PATCH 9/9] arm64: dts: r8a7795: Drop 0x from unit address of gic Simon Horman 2016-06-08 0:59 ` Simon Horman 2016-06-13 22:29 ` [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.8 Olof Johansson 2016-06-13 22:29 ` Olof Johansson
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