From: Joshua Clayton <stillcompiling@gmail.com> To: Alan Tull <atull@kernel.org>, Moritz Fischer <moritz.fischer@ettus.com>, Anatolij Gustschin <agust@denx.de>, Bastian Stender <bst@pengutronix.de>, Shawn Guo <shawnguo@kernel.org>, Joshua Clayton <stillcompiling@gmail.com> Cc: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Sascha Hauer <kernel@pengutronix.de>, Fabio Estevam <fabio.estevam@nxp.com>, Russell King <linux@armlinux.org.uk>, linux-fpga@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v12 2/6] doc: dt: document altera-passive-serial binding Date: Fri, 2 Jun 2017 13:30:48 -0700 [thread overview] Message-ID: <4945d90535e701e4e0207c08a7543a7623b94aeb.1496434383.git.stillcompiling@gmail.com> (raw) In-Reply-To: <684ea151ba9aa2c6555a299daf56552ddc11f596.1496434383.git.stillcompiling@gmail.com> In-Reply-To: <20170525172911.11467-1-stillcompiling@gmail.com> Describe an altera-passive-serial devicetree entry, required features Signed-off-by: Joshua Clayton <stillcompiling@gmail.com> Acked-by: Rob Herring <robh@kernel.org> --- .../bindings/fpga/altera-passive-serial.txt | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/altera-passive-serial.txt diff --git a/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt new file mode 100644 index 000000000000..48478bc07e29 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt @@ -0,0 +1,29 @@ +Altera Passive Serial SPI FPGA Manager + +Altera FPGAs support a method of loading the bitstream over what is +referred to as "passive serial". +The passive serial link is not technically SPI, and might require extra +circuits in order to play nicely with other SPI slaves on the same bus. + +See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf + +Required properties: +- compatible: Must be one of the following: + "altr,fpga-passive-serial", + "altr,fpga-arria10-passive-serial" +- reg: SPI chip select of the FPGA +- nconfig-gpios: config pin (referred to as nCONFIG in the manual) +- nstat-gpios: status pin (referred to as nSTATUS in the manual) + +Optional properties: +- confd-gpios: confd pin (referred to as CONF_DONE in the manual) + +Example: + fpga: fpga@0 { + compatible = "altr,fpga-passive-serial"; + spi-max-frequency = <20000000>; + reg = <0>; + nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; + nstat-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; + confd-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; + }; -- 2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: stillcompiling@gmail.com (Joshua Clayton) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v12 2/6] doc: dt: document altera-passive-serial binding Date: Fri, 2 Jun 2017 13:30:48 -0700 [thread overview] Message-ID: <4945d90535e701e4e0207c08a7543a7623b94aeb.1496434383.git.stillcompiling@gmail.com> (raw) In-Reply-To: <684ea151ba9aa2c6555a299daf56552ddc11f596.1496434383.git.stillcompiling@gmail.com> Describe an altera-passive-serial devicetree entry, required features Signed-off-by: Joshua Clayton <stillcompiling@gmail.com> Acked-by: Rob Herring <robh@kernel.org> --- .../bindings/fpga/altera-passive-serial.txt | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/altera-passive-serial.txt diff --git a/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt new file mode 100644 index 000000000000..48478bc07e29 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt @@ -0,0 +1,29 @@ +Altera Passive Serial SPI FPGA Manager + +Altera FPGAs support a method of loading the bitstream over what is +referred to as "passive serial". +The passive serial link is not technically SPI, and might require extra +circuits in order to play nicely with other SPI slaves on the same bus. + +See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf + +Required properties: +- compatible: Must be one of the following: + "altr,fpga-passive-serial", + "altr,fpga-arria10-passive-serial" +- reg: SPI chip select of the FPGA +- nconfig-gpios: config pin (referred to as nCONFIG in the manual) +- nstat-gpios: status pin (referred to as nSTATUS in the manual) + +Optional properties: +- confd-gpios: confd pin (referred to as CONF_DONE in the manual) + +Example: + fpga: fpga at 0 { + compatible = "altr,fpga-passive-serial"; + spi-max-frequency = <20000000>; + reg = <0>; + nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; + nstat-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; + confd-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; + }; -- 2.11.0
next prev parent reply other threads:[~2017-06-02 20:31 UTC|newest] Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-05-25 17:29 [PATCH v11 0/6] FPGA Manager support for altera passive serial Joshua Clayton 2017-05-25 17:29 ` Joshua Clayton 2017-05-25 17:29 ` Joshua Clayton 2017-05-25 17:29 ` [PATCH v11 1/6] fpga: Add flag to indicate SPI bitstream is bit-reversed Joshua Clayton 2017-05-25 17:29 ` Joshua Clayton 2017-05-25 17:29 ` Joshua Clayton 2017-05-25 17:29 ` [PATCH v11 2/6] doc: dt: add altera-ps-spi binding document Joshua Clayton 2017-05-25 17:29 ` Joshua Clayton 2017-05-25 17:29 ` Joshua Clayton 2017-05-25 17:29 ` [PATCH v11 3/6] fpga manager: Add altera-ps-spi driver for Altera FPGAs Joshua Clayton 2017-05-25 17:29 ` Joshua Clayton 2017-05-25 17:29 ` Joshua Clayton 2017-05-25 17:29 ` [PATCH v11 4/6] ARM: dts: imx6q-evi: support altera-ps-spi Joshua Clayton 2017-05-25 17:29 ` Joshua Clayton 2017-06-02 16:30 ` Andreas Färber 2017-06-02 16:30 ` Andreas Färber 2017-06-02 16:30 ` Andreas Färber 2017-06-02 19:39 ` stillcompiling 2017-06-02 19:39 ` stillcompiling at gmail.com 2017-06-02 19:39 ` stillcompiling-Re5JQEeQqe8AvxtiuMwx3w 2017-06-02 19:54 ` Andreas Färber 2017-06-02 19:54 ` Andreas Färber 2017-06-02 19:54 ` Andreas Färber 2017-06-02 21:10 ` stillcompiling 2017-06-02 21:10 ` stillcompiling at gmail.com 2017-06-02 21:10 ` stillcompiling-Re5JQEeQqe8AvxtiuMwx3w 2017-06-05 15:10 ` Alan Tull 2017-06-05 15:10 ` Alan Tull 2017-06-05 15:10 ` Alan Tull 2017-05-25 17:29 ` [PATCH v11 5/6] lib: add bitrev8x4() Joshua Clayton 2017-05-25 17:29 ` Joshua Clayton 2017-05-25 17:29 ` Joshua Clayton 2017-05-25 17:29 ` [PATCH v11 6/6] fpga-manager: altera-ps-spi: use bitrev8x4 Joshua Clayton 2017-05-25 17:29 ` Joshua Clayton 2017-05-25 17:29 ` Joshua Clayton 2017-06-02 15:49 ` [PATCH v11 0/6] FPGA Manager support for altera passive serial Anatolij Gustschin 2017-06-02 15:49 ` Anatolij Gustschin 2017-06-02 15:49 ` Anatolij Gustschin 2017-06-02 20:30 ` [PATCH v12 1/6] fpga: Add flag to indicate SPI bitstream is bit-reversed Joshua Clayton 2017-06-02 20:30 ` Joshua Clayton 2017-06-02 20:30 ` Joshua Clayton 2017-06-05 15:11 ` Alan Tull 2017-06-05 15:11 ` Alan Tull 2017-06-05 15:11 ` Alan Tull 2017-06-02 20:30 ` Joshua Clayton [this message] 2017-06-02 20:30 ` [PATCH v12 2/6] doc: dt: document altera-passive-serial binding Joshua Clayton 2017-06-05 15:11 ` Alan Tull 2017-06-05 15:11 ` Alan Tull 2017-06-05 15:11 ` Alan Tull 2017-06-02 20:30 ` [PATCH v12 3/6] fpga manager: Add altera-ps-spi driver for Altera FPGAs Joshua Clayton 2017-06-02 20:30 ` Joshua Clayton 2017-06-02 20:30 ` Joshua Clayton 2017-06-05 15:11 ` Alan Tull 2017-06-05 15:11 ` Alan Tull 2017-06-05 15:11 ` Alan Tull 2017-06-02 20:30 ` [PATCH v12 4/6] ARM: dts: imx6q-evi: support altera-ps-spi Joshua Clayton 2017-06-02 20:30 ` Joshua Clayton 2017-06-05 15:12 ` Alan Tull 2017-06-05 15:12 ` Alan Tull 2017-06-05 15:12 ` Alan Tull 2017-06-02 20:30 ` [PATCH v12 5/6] lib: add bitrev8x4() Joshua Clayton 2017-06-02 20:30 ` Joshua Clayton 2017-06-05 15:12 ` Alan Tull 2017-06-05 15:12 ` Alan Tull 2017-06-05 15:12 ` Alan Tull 2017-06-02 20:30 ` [PATCH v12 6/6] fpga-manager: altera-ps-spi: use bitrev8x4 Joshua Clayton 2017-06-02 20:30 ` Joshua Clayton 2017-06-05 15:13 ` Alan Tull 2017-06-05 15:13 ` Alan Tull 2017-06-05 15:13 ` Alan Tull
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