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From: Varadarajan Narayanan <quic_varada@quicinc.com>
To: <agross@kernel.org>, <andersson@kernel.org>,
	<konrad.dybcio@linaro.org>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
	<mturquette@baylibre.com>, <sboyd@kernel.org>,
	<rafael@kernel.org>, <viresh.kumar@linaro.org>,
	<ilia.lin@kernel.org>, <sivaprak@codeaurora.org>,
	<quic_kathirav@quicinc.com>, <linux-arm-msm@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-clk@vger.kernel.org>, <linux-pm@vger.kernel.org>
Cc: Varadarajan Narayanan <quic_varada@quicinc.com>,
	Praveenkumar I <ipkumar@codeaurora.org>
Subject: [PATCH v5 8/9] cpufreq: qti: Introduce cpufreq for ipq95xx
Date: Fri, 20 Oct 2023 11:49:38 +0530	[thread overview]
Message-ID: <4c8c2c2684f3824742bc2c6db7d10fa504616a33.1697781921.git.quic_varada@quicinc.com> (raw)
In-Reply-To: <cover.1697781921.git.quic_varada@quicinc.com>

IPQ95xx SoCs have different OPPs available for the CPU based on
the SoC variant. This can be determined from an eFuse register
present in the silicon.

Added support for ipq95xx on nvmem driver which helps to
determine OPPs at runtime based on the eFuse register which
has the CPU frequency limits. opp-supported-hw dt binding
can be used to indicate the available OPPs for each limit.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Praveenkumar I <ipkumar@codeaurora.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
---
v5:	Merge IPQ95xx with APQ8096 case
v2:	Simplify bin selection by tweaking the order in dts
---
 drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
 drivers/cpufreq/qcom-cpufreq-nvmem.c | 6 ++++++
 2 files changed, 7 insertions(+)

diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index f43e5cd..4f794ba 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -183,6 +183,7 @@ static const struct of_device_id blocklist[] __initconst = {
 	{ .compatible = "qcom,ipq5332", },
 	{ .compatible = "qcom,ipq8064", },
 	{ .compatible = "qcom,ipq8074", },
+	{ .compatible = "qcom,ipq9574", },
 	{ .compatible = "qcom,apq8064", },
 	{ .compatible = "qcom,msm8974", },
 	{ .compatible = "qcom,msm8960", },
diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c
index e7e6a6a..5827005 100644
--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
@@ -158,6 +158,11 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
 	case QCOM_ID_IPQ5312:
 	case QCOM_ID_IPQ5302:
 	case QCOM_ID_IPQ5300:
+	case QCOM_ID_IPQ9514:
+	case QCOM_ID_IPQ9550:
+	case QCOM_ID_IPQ9554:
+	case QCOM_ID_IPQ9570:
+	case QCOM_ID_IPQ9574:
 		drv->versions = 1 << (unsigned int)(*speedbin);
 		break;
 	case QCOM_ID_MSM8996SG:
@@ -415,6 +420,7 @@ static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
 	{ .compatible = "qcom,ipq8064", .data = &match_data_krait },
 	{ .compatible = "qcom,ipq8074", .data = &match_data_ipq8074 },
 	{ .compatible = "qcom,apq8064", .data = &match_data_krait },
+	{ .compatible = "qcom,ipq9574", .data = &match_data_kryo },
 	{ .compatible = "qcom,msm8974", .data = &match_data_krait },
 	{ .compatible = "qcom,msm8960", .data = &match_data_krait },
 	{},
-- 
2.7.4


  parent reply	other threads:[~2023-10-20  6:21 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-20  6:19 [PATCH v5 0/9] Enable cpufreq for IPQ5332 & IPQ9574 Varadarajan Narayanan
2023-10-20  6:19 ` [PATCH v5 1/9] clk: qcom: config IPQ_APSS_6018 should depend on QCOM_SMEM Varadarajan Narayanan
2023-10-21 17:02   ` Konrad Dybcio
2023-10-20  6:19 ` [PATCH v5 2/9] clk: qcom: clk-alpha-pll: introduce stromer plus ops Varadarajan Narayanan
2023-10-20  6:19 ` [PATCH v5 3/9] clk: qcom: apss-ipq-pll: Use stromer plus ops for stromer plus pll Varadarajan Narayanan
2023-10-21 17:02   ` Konrad Dybcio
2023-10-20  6:19 ` [PATCH v5 4/9] clk: qcom: apss-ipq-pll: Fix 'l' value for ipq5332_pll_config Varadarajan Narayanan
2023-10-20  6:19 ` [PATCH v5 5/9] clk: qcom: apss-ipq6018: ipq5332: add safe source switch for a53pll Varadarajan Narayanan
2023-10-21 17:04   ` Konrad Dybcio
2023-10-24  0:48   ` Stephen Boyd
2023-10-20  6:19 ` [PATCH v5 6/9] cpufreq: qti: Enable cpufreq for ipq53xx Varadarajan Narayanan
2023-10-20  6:19 ` [PATCH v5 7/9] arm64: dts: qcom: ipq5332: populate the opp table based on the eFuse Varadarajan Narayanan
2023-10-20  6:19 ` Varadarajan Narayanan [this message]
2023-10-20  6:19 ` [PATCH v5 9/9] arm64: dts: qcom: ipq9574: " Varadarajan Narayanan
2023-10-20  7:09 ` [PATCH v5 0/9] Enable cpufreq for IPQ5332 & IPQ9574 Viresh Kumar
2023-10-20  8:03   ` Varadarajan Narayanan
2023-10-25  6:25     ` Viresh Kumar
2023-10-31  7:14       ` Varadarajan Narayanan
2023-10-21 15:58 ` (subset) " Bjorn Andersson
2023-10-22 15:50 ` Bjorn Andersson

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