From: Thomas Richter <thor@math.tu-berlin.de>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org
Subject: [PATCH] Workaround for flicker with panning on the i830
Date: Fri, 08 Nov 2013 16:25:01 +0100 [thread overview]
Message-ID: <527D024D.8020000@math.tu-berlin.de> (raw)
In-Reply-To: <32493_1383921850_527CF8B9_32493_10045_1_20131108075743.GZ14082@phenom.ffwll.local>
[-- Attachment #1: Type: text/plain, Size: 1595 bytes --]
Hi Daniel, dear intel-experts,
please find a revised patch attached that addresses the flicker with
panning on the i830 chipset. This patch has now been tested
on various screen layouts and seems to be quite reliable, i.e. I haven't
seen the flicker since.
Unfortunately, I have not been able to find a good workaround for the
same problem on a tiled framebuffer, the pattern there, i.e. when
the flicker appears, is quite irregular, and it is unclear how to
address it. The situation is even worse for 8bit/pixel framebuffers where,
for some panning positions, the display remains completely blank. It
flickers once or twice, then gets a hick-up, and then stays off.
The patch is currently only active on the i830, and only on pipelines
using the VGA or DVO output. Strangely enough, LVDS does not
seem to be affected, so maybe it is some memory/prefetch related
problem. I also checked the debug output, though I found no
suspicious activity while the screen flickers or is off. For a linear
framebuffer, it seems to be enough to position the start of the
pipeline ahead of the desired position, wait one vertical blank, and
then adjust it to the correct position. For tiling or 8bit modes,
this does not work.
Sorry if the formatting is off. This is just what emacs left me with.
Please feel free to reformat as you prefer.
As a related question: Is there possibly a command line tool that would
allow me to modify the intel chipset registers on the fly without going
through a kernel recompile? It would make some experiments just so much
simpler.
Greetings,
Thomas
[-- Attachment #2: diff --]
[-- Type: text/plain, Size: 2042 bytes --]
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e5eb11d..e98298f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2087,8 +2087,44 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,
i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset);
I915_WRITE(DSPTILEOFF(plane), (y << 16) | x);
I915_WRITE(DSPLINOFF(plane), linear_offset);
- } else
- I915_WRITE(DSPADDR(plane), i915_gem_obj_ggtt_offset(obj) + linear_offset);
+ } else if (INTEL_INFO(dev)->gen == 2 && IS_I830(dev) && !intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
+ unsigned long planeadr = i915_gem_obj_ggtt_offset(obj) + linear_offset;
+ DRM_DEBUG_KMS("Plane address is 0x%lx",planeadr);
+ // I830 panning flicker work around. Only for non-LVDS output, only for i830.
+ if (obj->tiling_mode != I915_TILING_NONE) {
+ if ((planeadr & 0x40)) {
+ DRM_DEBUG_KMS("Detected potential flicker in tiling mode");
+ DRM_DEBUG_KMS("No workaround available");
+ DRM_DEBUG_KMS("Use a linear frame buffer");
+ }
+ } else {
+ switch (fb->pixel_format) {
+ case DRM_FORMAT_XRGB1555:
+ case DRM_FORMAT_ARGB1555:
+ case DRM_FORMAT_RGB565:
+ case DRM_FORMAT_XRGB8888:
+ case DRM_FORMAT_ARGB8888:
+ case DRM_FORMAT_XBGR8888:
+ case DRM_FORMAT_ABGR8888:
+ {
+ unsigned long int oldadr = I915_READ(DSPADDR(plane));
+ if (((oldadr ^ planeadr) & 0x40) && (planeadr & 0xc0) == 0xc0) {
+ DRM_DEBUG_KMS("Detected potential flicker in linear mode");
+ I915_WRITE(DSPADDR(plane), planeadr & (~(0x80)));
+ POSTING_READ(reg);
+ intel_wait_for_vblank(dev,intel_crtc->pipe);
+ }
+ }
+ break;
+ default:
+ DRM_DEBUG_KMS("No flicker workaround available\n");
+ break;
+ }
+ }
+ I915_WRITE(DSPADDR(plane), planeadr);
+ } else {
+ I915_WRITE(DSPADDR(plane), i915_gem_obj_ggtt_offset(obj) + linear_offset);
+ }
POSTING_READ(reg);
return 0;
[-- Attachment #3: Type: text/plain, Size: 159 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2013-11-08 21:25 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-07 10:05 [PATCH 1/7] drm/i915: Optimize pipe irq handling on bdw Daniel Vetter
2013-11-07 10:05 ` [PATCH 2/7] drm/i915: Fix up the bdw pipe interrupt enable lists Daniel Vetter
2013-11-07 13:49 ` [PATCH] " Daniel Vetter
2013-11-07 14:00 ` Ville Syrjälä
2013-11-07 10:05 ` [PATCH 3/7] drm/i915: Wire up port A aux channel Daniel Vetter
2013-11-07 13:20 ` Ville Syrjälä
2013-11-07 13:49 ` [PATCH] " Daniel Vetter
2013-11-07 13:59 ` Ville Syrjälä
2013-11-07 10:05 ` [PATCH 4/7] drm/i915: Wire up PCH interrupts for bdw Daniel Vetter
2013-11-07 10:05 ` [PATCH 5/7] drm/i915: Wire up pipe CRC support " Daniel Vetter
2013-11-07 10:05 ` [PATCH 6/7] drm/i915: Optimize gen8_enable|disable_vblank functions Daniel Vetter
2013-11-07 13:37 ` Ville Syrjälä
2013-11-07 14:31 ` [PATCH 1/2] drm/i915: Mask the vblank interrupt on bdw by default Daniel Vetter
2013-11-07 14:31 ` [PATCH 2/2] drm/i915/bdw: Take render error interrupt out of the mask Daniel Vetter
2013-11-07 14:35 ` [PATCH 1/2] drm/i915: Mask the vblank interrupt on bdw by default Ville Syrjälä
2013-11-07 10:05 ` [PATCH 7/7] drm/i915: Wire up cpu fifo underrun reporting support for bdw Daniel Vetter
2013-11-07 13:08 ` [PATCH 1/7] drm/i915: Optimize pipe irq handling on bdw Ville Syrjälä
2013-11-07 13:45 ` Ville Syrjälä
2013-11-08 7:57 ` Daniel Vetter
[not found] ` <32493_1383921850_527CF8B9_32493_10045_1_20131108075743.GZ14082@phenom.ffwll.local>
2013-11-08 15:25 ` Thomas Richter [this message]
2013-11-08 16:32 ` [PATCH] Workaround for flicker with panning on the i830 Daniel Vetter
[not found] ` <32493_1383928311_527D11F3_32493_10984_1_20131108163213.GC14082@phenom.ffwll.local>
2013-11-11 15:33 ` Thomas Richter
2013-11-11 15:43 ` Daniel Vetter
[not found] ` <1565_1384184620_5280FB2C_1565_9181_1_CAKMK7uF2UmKJHvVPrzE7-7A9DQ5JrLHAFnDiuVUDHFU+DoOXww@mail.gmail.com>
2013-11-12 16:41 ` Thomas Richter
2013-11-12 17:22 ` Daniel Vetter
[not found] ` <1565_1384276909_528263AC_1565_19510_1_20131112172217.GB3741@phenom.ffwll.local>
2013-11-13 19:50 ` Thomas Richter
2013-11-13 20:20 ` Daniel Vetter
[not found] ` <26136_1384374018_5283DF02_26136_9623_1_20131113202049.GH7251@phenom.ffwll.local>
2013-11-14 7:14 ` Thomas Richter
2013-11-14 8:21 ` Daniel Vetter
[not found] ` <26136_1384417275_528487FB_26136_12808_1_CAKMK7uEfiAoFutfk=mtqteuV07t5SneGniyXnRet_T3Bs4spRw@mail.gmail.com>
2013-11-14 18:15 ` Thomas Richter
2013-11-14 18:33 ` Daniel Vetter
[not found] ` <26136_1384453961_52851749_26136_18549_1_20131114183308.GI22741@phenom.ffwll.local>
2013-11-15 13:16 ` Workaround for flicker with panning on the i830 - found a way for tiled displays Thomas Richter
2013-11-15 15:41 ` Daniel Vetter
[not found] ` <10422_1384530087_528640A7_10422_3841_1_20131115154159.GU22741@phenom.ffwll.local>
2013-11-15 16:08 ` Thomas Richter
2013-11-15 17:01 ` Thomas Richter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=527D024D.8020000@math.tu-berlin.de \
--to=thor@math.tu-berlin.de \
--cc=daniel@ffwll.ch \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.