From: "Jan Beulich" <JBeulich@suse.com>
To: xen-devel <xen-devel@lists.xenproject.org>
Cc: George Dunlap <George.Dunlap@eu.citrix.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Boris Ostrovsky <boris.ostrovsky@oracle.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PATCH 07/10] x86/SVM: use unambiguous register names
Date: Tue, 20 Dec 2016 03:41:18 -0700 [thread overview]
Message-ID: <585918DE020000780012ADCF@prv-mh.provo.novell.com> (raw)
In-Reply-To: <58590E27020000780012AD5E@prv-mh.provo.novell.com>
[-- Attachment #1: Type: text/plain, Size: 6962 bytes --]
This is in preparation of eliminating the mis-naming of 64-bit fields
with 32-bit register names (eflags instead of rflags etc). Use the
guaranteed 32-bit underscore prefixed names for now where appropriate.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/hvm/svm/nestedsvm.c
+++ b/xen/arch/x86/hvm/svm/nestedsvm.c
@@ -322,10 +322,10 @@ static int nsvm_vcpu_hostrestore(struct
if (rc != X86EMUL_OKAY)
gdprintk(XENLOG_ERR, "hvm_set_cr3 failed, rc: %u\n", rc);
- regs->eax = n1vmcb->rax;
- regs->esp = n1vmcb->rsp;
- regs->eip = n1vmcb->rip;
- regs->eflags = n1vmcb->rflags;
+ regs->rax = n1vmcb->rax;
+ regs->rsp = n1vmcb->rsp;
+ regs->rip = n1vmcb->rip;
+ regs->rflags = n1vmcb->rflags;
n1vmcb->_dr7 = 0; /* disable all breakpoints */
n1vmcb->_cpl = 0;
@@ -653,10 +653,10 @@ static int nsvm_vmcb_prepare4vmrun(struc
}
/* Switch guest registers to l2 guest */
- regs->eax = ns_vmcb->rax;
- regs->eip = ns_vmcb->rip;
- regs->esp = ns_vmcb->rsp;
- regs->eflags = ns_vmcb->rflags;
+ regs->rax = ns_vmcb->rax;
+ regs->rip = ns_vmcb->rip;
+ regs->rsp = ns_vmcb->rsp;
+ regs->rflags = ns_vmcb->rflags;
#undef vcleanbit_set
return 0;
@@ -975,7 +975,7 @@ nsvm_vmcb_guest_intercepts_exitcode(stru
break;
ns_vmcb = nv->nv_vvmcx;
vmexits = nsvm_vmcb_guest_intercepts_msr(svm->ns_cached_msrpm,
- regs->ecx, ns_vmcb->exitinfo1 != 0);
+ regs->_ecx, ns_vmcb->exitinfo1 != 0);
if (vmexits == NESTEDHVM_VMEXIT_HOST)
return 0;
break;
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -110,12 +110,12 @@ void __update_guest_eip(struct cpu_user_
ASSERT(regs == guest_cpu_user_regs());
- regs->eip += inst_len;
- regs->eflags &= ~X86_EFLAGS_RF;
+ regs->rip += inst_len;
+ regs->_eflags &= ~X86_EFLAGS_RF;
curr->arch.hvm_svm.vmcb->interrupt_shadow = 0;
- if ( regs->eflags & X86_EFLAGS_TF )
+ if ( regs->_eflags & X86_EFLAGS_TF )
hvm_inject_hw_exception(TRAP_debug, X86_EVENT_NO_EC);
}
@@ -520,7 +520,7 @@ static int svm_guest_x86_mode(struct vcp
if ( unlikely(!(v->arch.hvm_vcpu.guest_cr[0] & X86_CR0_PE)) )
return 0;
- if ( unlikely(guest_cpu_user_regs()->eflags & X86_EFLAGS_VM) )
+ if ( unlikely(guest_cpu_user_regs()->_eflags & X86_EFLAGS_VM) )
return 1;
if ( hvm_long_mode_enabled(v) && likely(vmcb->cs.attr.fields.l) )
return 8;
@@ -1226,7 +1226,7 @@ static void svm_inject_event(const struc
switch ( _event.vector )
{
case TRAP_debug:
- if ( regs->eflags & X86_EFLAGS_TF )
+ if ( regs->_eflags & X86_EFLAGS_TF )
{
__restore_debug_registers(vmcb, curr);
vmcb_set_dr6(vmcb, vmcb_get_dr6(vmcb) | 0x4000);
@@ -1635,18 +1635,18 @@ static void svm_vmexit_do_cpuid(struct c
if ( (inst_len = __get_instruction_length(current, INSTR_CPUID)) == 0 )
return;
- eax = regs->eax;
- ebx = regs->ebx;
- ecx = regs->ecx;
- edx = regs->edx;
+ eax = regs->_eax;
+ ebx = regs->_ebx;
+ ecx = regs->_ecx;
+ edx = regs->_edx;
hvm_cpuid(regs->_eax, &eax, &ebx, &ecx, &edx);
HVMTRACE_5D(CPUID, regs->_eax, eax, ebx, ecx, edx);
- regs->eax = eax;
- regs->ebx = ebx;
- regs->ecx = ecx;
- regs->edx = edx;
+ regs->rax = eax;
+ regs->rbx = ebx;
+ regs->rcx = ecx;
+ regs->rdx = edx;
__update_guest_eip(regs, inst_len);
}
@@ -2011,7 +2011,7 @@ static void svm_vmexit_do_hlt(struct vmc
return;
__update_guest_eip(regs, inst_len);
- hvm_hlt(regs->eflags);
+ hvm_hlt(regs->_eflags);
}
static void svm_vmexit_do_rdtsc(struct cpu_user_regs *regs)
@@ -2332,13 +2332,11 @@ void svm_vmexit_handler(struct cpu_user_
if ( hvm_long_mode_enabled(v) )
HVMTRACE_ND(VMEXIT64, vcpu_guestmode ? TRC_HVM_NESTEDFLAG : 0,
1/*cycles*/, 3, exit_reason,
- (uint32_t)regs->eip, (uint32_t)((uint64_t)regs->eip >> 32),
- 0, 0, 0);
+ regs->_eip, regs->rip >> 32, 0, 0, 0);
else
HVMTRACE_ND(VMEXIT, vcpu_guestmode ? TRC_HVM_NESTEDFLAG : 0,
1/*cycles*/, 2, exit_reason,
- (uint32_t)regs->eip,
- 0, 0, 0, 0);
+ regs->_eip, 0, 0, 0, 0);
if ( vcpu_guestmode ) {
enum nestedhvm_vmexits nsret;
@@ -2476,9 +2474,8 @@ void svm_vmexit_handler(struct cpu_user_
regs->error_code = vmcb->exitinfo1;
HVM_DBG_LOG(DBG_LEVEL_VMMU,
"eax=%lx, ebx=%lx, ecx=%lx, edx=%lx, esi=%lx, edi=%lx",
- (unsigned long)regs->eax, (unsigned long)regs->ebx,
- (unsigned long)regs->ecx, (unsigned long)regs->edx,
- (unsigned long)regs->esi, (unsigned long)regs->edi);
+ regs->rax, regs->rbx, regs->rcx,
+ regs->rdx, regs->rsi, regs->rdi);
if ( cpu_has_svm_decode )
v->arch.hvm_svm.cached_insn_len = vmcb->guest_ins_len & 0xf;
@@ -2616,7 +2613,7 @@ void svm_vmexit_handler(struct cpu_user_
case VMEXIT_INVLPGA:
if ( (inst_len = __get_instruction_length(v, INSTR_INVLPGA)) == 0 )
break;
- svm_invlpga_intercept(v, regs->eax, regs->ecx);
+ svm_invlpga_intercept(v, regs->rax, regs->_ecx);
__update_guest_eip(regs, inst_len);
break;
@@ -2624,7 +2621,7 @@ void svm_vmexit_handler(struct cpu_user_
if ( (inst_len = __get_instruction_length(v, INSTR_VMCALL)) == 0 )
break;
BUG_ON(vcpu_guestmode);
- HVMTRACE_1D(VMMCALL, regs->eax);
+ HVMTRACE_1D(VMMCALL, regs->_eax);
rc = hvm_do_hypercall(regs);
if ( rc != HVM_HCALL_preempted )
{
@@ -2648,7 +2645,7 @@ void svm_vmexit_handler(struct cpu_user_
break;
case VMEXIT_RDTSCP:
- regs->ecx = hvm_msr_tsc_aux(v);
+ regs->rcx = hvm_msr_tsc_aux(v);
/* fall through */
case VMEXIT_RDTSC:
svm_vmexit_do_rdtsc(regs);
@@ -2660,13 +2657,13 @@ void svm_vmexit_handler(struct cpu_user_
break;
case VMEXIT_VMRUN:
- svm_vmexit_do_vmrun(regs, v, regs->eax);
+ svm_vmexit_do_vmrun(regs, v, regs->rax);
break;
case VMEXIT_VMLOAD:
- svm_vmexit_do_vmload(vmcb, regs, v, regs->eax);
+ svm_vmexit_do_vmload(vmcb, regs, v, regs->rax);
break;
case VMEXIT_VMSAVE:
- svm_vmexit_do_vmsave(vmcb, regs, v, regs->eax);
+ svm_vmexit_do_vmsave(vmcb, regs, v, regs->rax);
break;
case VMEXIT_STGI:
svm_vmexit_do_stgi(regs, v);
[-- Attachment #2: x86-regnames-SVM.patch --]
[-- Type: text/plain, Size: 7001 bytes --]
x86/SVM: use unambiguous register names
This is in preparation of eliminating the mis-naming of 64-bit fields
with 32-bit register names (eflags instead of rflags etc). Use the
guaranteed 32-bit underscore prefixed names for now where appropriate.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/hvm/svm/nestedsvm.c
+++ b/xen/arch/x86/hvm/svm/nestedsvm.c
@@ -322,10 +322,10 @@ static int nsvm_vcpu_hostrestore(struct
if (rc != X86EMUL_OKAY)
gdprintk(XENLOG_ERR, "hvm_set_cr3 failed, rc: %u\n", rc);
- regs->eax = n1vmcb->rax;
- regs->esp = n1vmcb->rsp;
- regs->eip = n1vmcb->rip;
- regs->eflags = n1vmcb->rflags;
+ regs->rax = n1vmcb->rax;
+ regs->rsp = n1vmcb->rsp;
+ regs->rip = n1vmcb->rip;
+ regs->rflags = n1vmcb->rflags;
n1vmcb->_dr7 = 0; /* disable all breakpoints */
n1vmcb->_cpl = 0;
@@ -653,10 +653,10 @@ static int nsvm_vmcb_prepare4vmrun(struc
}
/* Switch guest registers to l2 guest */
- regs->eax = ns_vmcb->rax;
- regs->eip = ns_vmcb->rip;
- regs->esp = ns_vmcb->rsp;
- regs->eflags = ns_vmcb->rflags;
+ regs->rax = ns_vmcb->rax;
+ regs->rip = ns_vmcb->rip;
+ regs->rsp = ns_vmcb->rsp;
+ regs->rflags = ns_vmcb->rflags;
#undef vcleanbit_set
return 0;
@@ -975,7 +975,7 @@ nsvm_vmcb_guest_intercepts_exitcode(stru
break;
ns_vmcb = nv->nv_vvmcx;
vmexits = nsvm_vmcb_guest_intercepts_msr(svm->ns_cached_msrpm,
- regs->ecx, ns_vmcb->exitinfo1 != 0);
+ regs->_ecx, ns_vmcb->exitinfo1 != 0);
if (vmexits == NESTEDHVM_VMEXIT_HOST)
return 0;
break;
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -110,12 +110,12 @@ void __update_guest_eip(struct cpu_user_
ASSERT(regs == guest_cpu_user_regs());
- regs->eip += inst_len;
- regs->eflags &= ~X86_EFLAGS_RF;
+ regs->rip += inst_len;
+ regs->_eflags &= ~X86_EFLAGS_RF;
curr->arch.hvm_svm.vmcb->interrupt_shadow = 0;
- if ( regs->eflags & X86_EFLAGS_TF )
+ if ( regs->_eflags & X86_EFLAGS_TF )
hvm_inject_hw_exception(TRAP_debug, X86_EVENT_NO_EC);
}
@@ -520,7 +520,7 @@ static int svm_guest_x86_mode(struct vcp
if ( unlikely(!(v->arch.hvm_vcpu.guest_cr[0] & X86_CR0_PE)) )
return 0;
- if ( unlikely(guest_cpu_user_regs()->eflags & X86_EFLAGS_VM) )
+ if ( unlikely(guest_cpu_user_regs()->_eflags & X86_EFLAGS_VM) )
return 1;
if ( hvm_long_mode_enabled(v) && likely(vmcb->cs.attr.fields.l) )
return 8;
@@ -1226,7 +1226,7 @@ static void svm_inject_event(const struc
switch ( _event.vector )
{
case TRAP_debug:
- if ( regs->eflags & X86_EFLAGS_TF )
+ if ( regs->_eflags & X86_EFLAGS_TF )
{
__restore_debug_registers(vmcb, curr);
vmcb_set_dr6(vmcb, vmcb_get_dr6(vmcb) | 0x4000);
@@ -1635,18 +1635,18 @@ static void svm_vmexit_do_cpuid(struct c
if ( (inst_len = __get_instruction_length(current, INSTR_CPUID)) == 0 )
return;
- eax = regs->eax;
- ebx = regs->ebx;
- ecx = regs->ecx;
- edx = regs->edx;
+ eax = regs->_eax;
+ ebx = regs->_ebx;
+ ecx = regs->_ecx;
+ edx = regs->_edx;
hvm_cpuid(regs->_eax, &eax, &ebx, &ecx, &edx);
HVMTRACE_5D(CPUID, regs->_eax, eax, ebx, ecx, edx);
- regs->eax = eax;
- regs->ebx = ebx;
- regs->ecx = ecx;
- regs->edx = edx;
+ regs->rax = eax;
+ regs->rbx = ebx;
+ regs->rcx = ecx;
+ regs->rdx = edx;
__update_guest_eip(regs, inst_len);
}
@@ -2011,7 +2011,7 @@ static void svm_vmexit_do_hlt(struct vmc
return;
__update_guest_eip(regs, inst_len);
- hvm_hlt(regs->eflags);
+ hvm_hlt(regs->_eflags);
}
static void svm_vmexit_do_rdtsc(struct cpu_user_regs *regs)
@@ -2332,13 +2332,11 @@ void svm_vmexit_handler(struct cpu_user_
if ( hvm_long_mode_enabled(v) )
HVMTRACE_ND(VMEXIT64, vcpu_guestmode ? TRC_HVM_NESTEDFLAG : 0,
1/*cycles*/, 3, exit_reason,
- (uint32_t)regs->eip, (uint32_t)((uint64_t)regs->eip >> 32),
- 0, 0, 0);
+ regs->_eip, regs->rip >> 32, 0, 0, 0);
else
HVMTRACE_ND(VMEXIT, vcpu_guestmode ? TRC_HVM_NESTEDFLAG : 0,
1/*cycles*/, 2, exit_reason,
- (uint32_t)regs->eip,
- 0, 0, 0, 0);
+ regs->_eip, 0, 0, 0, 0);
if ( vcpu_guestmode ) {
enum nestedhvm_vmexits nsret;
@@ -2476,9 +2474,8 @@ void svm_vmexit_handler(struct cpu_user_
regs->error_code = vmcb->exitinfo1;
HVM_DBG_LOG(DBG_LEVEL_VMMU,
"eax=%lx, ebx=%lx, ecx=%lx, edx=%lx, esi=%lx, edi=%lx",
- (unsigned long)regs->eax, (unsigned long)regs->ebx,
- (unsigned long)regs->ecx, (unsigned long)regs->edx,
- (unsigned long)regs->esi, (unsigned long)regs->edi);
+ regs->rax, regs->rbx, regs->rcx,
+ regs->rdx, regs->rsi, regs->rdi);
if ( cpu_has_svm_decode )
v->arch.hvm_svm.cached_insn_len = vmcb->guest_ins_len & 0xf;
@@ -2616,7 +2613,7 @@ void svm_vmexit_handler(struct cpu_user_
case VMEXIT_INVLPGA:
if ( (inst_len = __get_instruction_length(v, INSTR_INVLPGA)) == 0 )
break;
- svm_invlpga_intercept(v, regs->eax, regs->ecx);
+ svm_invlpga_intercept(v, regs->rax, regs->_ecx);
__update_guest_eip(regs, inst_len);
break;
@@ -2624,7 +2621,7 @@ void svm_vmexit_handler(struct cpu_user_
if ( (inst_len = __get_instruction_length(v, INSTR_VMCALL)) == 0 )
break;
BUG_ON(vcpu_guestmode);
- HVMTRACE_1D(VMMCALL, regs->eax);
+ HVMTRACE_1D(VMMCALL, regs->_eax);
rc = hvm_do_hypercall(regs);
if ( rc != HVM_HCALL_preempted )
{
@@ -2648,7 +2645,7 @@ void svm_vmexit_handler(struct cpu_user_
break;
case VMEXIT_RDTSCP:
- regs->ecx = hvm_msr_tsc_aux(v);
+ regs->rcx = hvm_msr_tsc_aux(v);
/* fall through */
case VMEXIT_RDTSC:
svm_vmexit_do_rdtsc(regs);
@@ -2660,13 +2657,13 @@ void svm_vmexit_handler(struct cpu_user_
break;
case VMEXIT_VMRUN:
- svm_vmexit_do_vmrun(regs, v, regs->eax);
+ svm_vmexit_do_vmrun(regs, v, regs->rax);
break;
case VMEXIT_VMLOAD:
- svm_vmexit_do_vmload(vmcb, regs, v, regs->eax);
+ svm_vmexit_do_vmload(vmcb, regs, v, regs->rax);
break;
case VMEXIT_VMSAVE:
- svm_vmexit_do_vmsave(vmcb, regs, v, regs->eax);
+ svm_vmexit_do_vmsave(vmcb, regs, v, regs->rax);
break;
case VMEXIT_STGI:
svm_vmexit_do_stgi(regs, v);
[-- Attachment #3: Type: text/plain, Size: 127 bytes --]
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next prev parent reply other threads:[~2016-12-20 10:41 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-20 9:55 [PATCH 00/10] x86: register renaming (part I) Jan Beulich
2016-12-20 10:36 ` [PATCH 01/10] x86/MSR: introduce MSR access split/fold helpers Jan Beulich
2016-12-23 6:17 ` Tian, Kevin
2016-12-26 4:54 ` Suravee Suthikulpanit
2016-12-20 10:36 ` [PATCH 02/10] x86/guest-walk: use unambiguous register names Jan Beulich
2016-12-28 11:18 ` George Dunlap
2016-12-28 13:53 ` Jan Beulich
2016-12-20 10:38 ` [PATCH 03/10] x86/shadow: " Jan Beulich
2016-12-20 11:04 ` Tim Deegan
2016-12-20 10:39 ` [PATCH 04/10] x86/oprofile: " Jan Beulich
2016-12-20 10:39 ` [PATCH 05/10] x86/HVM: " Jan Beulich
2016-12-20 17:39 ` Andrew Cooper
2016-12-21 15:31 ` Jan Beulich
2016-12-20 10:40 ` [PATCH 06/10] x86/HVMemul: " Jan Beulich
2016-12-20 10:41 ` Jan Beulich [this message]
2016-12-26 5:46 ` [PATCH 07/10] x86/SVM: " Suravee Suthikulpanit
2016-12-20 10:42 ` [PATCH 08/10] x86/vm-event: " Jan Beulich
2016-12-20 17:30 ` Tamas K Lengyel
2016-12-22 16:08 ` Razvan Cojocaru
2016-12-20 10:42 ` [PATCH 09/10] x86/traps: " Jan Beulich
2016-12-20 10:43 ` [PATCH 10/10] x86/misc: " Jan Beulich
2016-12-20 17:34 ` [PATCH 00/10] x86: register renaming (part I) Andrew Cooper
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