From: Baruch Siach <baruch@tkos.co.il> To: linux-arm-kernel@lists.infradead.org, Daniel Lezcano <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de> Cc: Baruch Siach <baruch@tkos.co.il>, linux-kernel@vger.kernel.org Subject: [PATCH v2 7/8] clocksource: driver for Conexant Digicolor SoC timer Date: Thu, 8 Jan 2015 21:40:03 +0200 [thread overview] Message-ID: <58cefe6b0d2787488dc668863a31d000615c4eea.1420744369.git.baruch@tkos.co.il> (raw) In-Reply-To: <cover.1420744368.git.baruch@tkos.co.il> Signed-off-by: Baruch Siach <baruch@tkos.co.il> --- drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-digicolor.c | 164 ++++++++++++++++++++++++++++++++++ 2 files changed, 165 insertions(+) create mode 100644 drivers/clocksource/timer-digicolor.c diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 94d90b24b56b..a993c108be67 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_SH_TIMER_TMU) += sh_tmu.o obj-$(CONFIG_EM_TIMER_STI) += em_sti.o obj-$(CONFIG_CLKBLD_I8253) += i8253.o obj-$(CONFIG_CLKSRC_MMIO) += mmio.o +obj-$(CONFIG_ARCH_DIGICOLOR) += timer-digicolor.o obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o obj-$(CONFIG_CLKSRC_NOMADIK_MTU) += nomadik-mtu.o diff --git a/drivers/clocksource/timer-digicolor.c b/drivers/clocksource/timer-digicolor.c new file mode 100644 index 000000000000..014c50675980 --- /dev/null +++ b/drivers/clocksource/timer-digicolor.c @@ -0,0 +1,164 @@ +/* + * Conexant Digicolor timer driver + * + * Author: Baruch Siach <baruch@tkos.co.il> + * + * Copyright (C) 2014 Paradox Innovation Ltd. + * + * Based on: + * Allwinner SoCs hstimer driver + * + * Copyright (C) 2013 Maxime Ripard + * + * Maxime Ripard <maxime.ripard@free-electrons.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/* + * Conexant Digicolor SoCs have 8 configurable timers, named from "Timer A" to + * "Timer H". Timer A is the only one with watchdog support, so it is dedicated + * to the watchdog driver. This driver uses Timer B for sched_clock(), and + * Timer C for clockevents. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include <linux/clk.h> +#include <linux/clockchips.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/irqreturn.h> +#include <linux/sched_clock.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> + +enum { + TIMER_A, + TIMER_B, + TIMER_C, + TIMER_D, + TIMER_E, + TIMER_F, + TIMER_G, + TIMER_H, +}; + +#define CONTROL(t) ((t)*8) +#define COUNT(t) ((t)*8 + 4) + +static void __iomem *timer_base; +static u32 ticks_per_jiffy; + +static void digicolor_clkevt_mode(enum clock_event_mode mode, + struct clock_event_device *clk) +{ + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: + writeb(0, timer_base + CONTROL(TIMER_C)); + writel(ticks_per_jiffy, timer_base + COUNT(TIMER_C)); + writeb(0x21, timer_base + CONTROL(TIMER_C)); + break; + case CLOCK_EVT_MODE_ONESHOT: + writeb(0, timer_base + CONTROL(TIMER_C)); + writeb(0x11, timer_base + CONTROL(TIMER_C)); + break; + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_SHUTDOWN: + default: + writeb(0, timer_base + CONTROL(TIMER_C)); + break; + } +} + +static int digicolor_clkevt_next_event(unsigned long evt, + struct clock_event_device *unused) +{ + writeb(0, timer_base + CONTROL(TIMER_C)); + writel(evt, timer_base + COUNT(TIMER_C)); + writeb(0x11, timer_base + CONTROL(TIMER_C)); + + return 0; +} + +static struct clock_event_device digicolor_clockevent = { + .name = "digicolor_tick", + .rating = 340, + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, + .set_mode = digicolor_clkevt_mode, + .set_next_event = digicolor_clkevt_next_event, +}; + + +static irqreturn_t digicolor_timer_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *evt = (struct clock_event_device *)dev_id; + + evt->event_handler(evt); + + return IRQ_HANDLED; +} + +static struct irqaction digicolor_timer_irq = { + .name = "digicolor_timerC", + .flags = IRQF_TIMER | IRQF_IRQPOLL, + .handler = digicolor_timer_interrupt, + .dev_id = &digicolor_clockevent, +}; + +static u64 digicolor_timer_sched_read(void) +{ + return ~readl(timer_base + COUNT(TIMER_B)); +} + +static void __init digicolor_timer_init(struct device_node *node) +{ + unsigned long rate; + struct clk *clk; + int ret, irq; + + timer_base = of_iomap(node, 0); + if (!timer_base) { + pr_err("Can't map registers"); + return; + } + + irq = irq_of_parse_and_map(node, TIMER_C); + if (irq <= 0) { + pr_err("Can't parse IRQ"); + return; + } + + clk = of_clk_get(node, 0); + if (IS_ERR(clk)) { + pr_err("Can't get timer clock"); + return; + } + clk_prepare_enable(clk); + rate = clk_get_rate(clk); + + writeb(0, timer_base + CONTROL(TIMER_B)); + writel(~0, timer_base + COUNT(TIMER_B)); + writeb(1, timer_base + CONTROL(TIMER_B)); + + sched_clock_register(digicolor_timer_sched_read, 32, rate); + clocksource_mmio_init(timer_base + COUNT(TIMER_B), node->name, + rate, 340, 32, clocksource_mmio_readl_down); + + ticks_per_jiffy = DIV_ROUND_UP(rate, HZ); + + ret = setup_irq(irq, &digicolor_timer_irq); + if (ret) + pr_warn("failed to setup timer irq %d (%d)\n", irq, ret); + + digicolor_clockevent.cpumask = cpu_possible_mask; + digicolor_clockevent.irq = irq; + + clockevents_config_and_register(&digicolor_clockevent, rate, 0, + 0xffffffff); +} +CLOCKSOURCE_OF_DECLARE(conexant_digicolor, "cnxt,cx92755-timer", + digicolor_timer_init); -- 2.1.4
WARNING: multiple messages have this Message-ID (diff)
From: baruch@tkos.co.il (Baruch Siach) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 7/8] clocksource: driver for Conexant Digicolor SoC timer Date: Thu, 8 Jan 2015 21:40:03 +0200 [thread overview] Message-ID: <58cefe6b0d2787488dc668863a31d000615c4eea.1420744369.git.baruch@tkos.co.il> (raw) In-Reply-To: <cover.1420744368.git.baruch@tkos.co.il> Signed-off-by: Baruch Siach <baruch@tkos.co.il> --- drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-digicolor.c | 164 ++++++++++++++++++++++++++++++++++ 2 files changed, 165 insertions(+) create mode 100644 drivers/clocksource/timer-digicolor.c diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 94d90b24b56b..a993c108be67 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_SH_TIMER_TMU) += sh_tmu.o obj-$(CONFIG_EM_TIMER_STI) += em_sti.o obj-$(CONFIG_CLKBLD_I8253) += i8253.o obj-$(CONFIG_CLKSRC_MMIO) += mmio.o +obj-$(CONFIG_ARCH_DIGICOLOR) += timer-digicolor.o obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o obj-$(CONFIG_CLKSRC_NOMADIK_MTU) += nomadik-mtu.o diff --git a/drivers/clocksource/timer-digicolor.c b/drivers/clocksource/timer-digicolor.c new file mode 100644 index 000000000000..014c50675980 --- /dev/null +++ b/drivers/clocksource/timer-digicolor.c @@ -0,0 +1,164 @@ +/* + * Conexant Digicolor timer driver + * + * Author: Baruch Siach <baruch@tkos.co.il> + * + * Copyright (C) 2014 Paradox Innovation Ltd. + * + * Based on: + * Allwinner SoCs hstimer driver + * + * Copyright (C) 2013 Maxime Ripard + * + * Maxime Ripard <maxime.ripard@free-electrons.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/* + * Conexant Digicolor SoCs have 8 configurable timers, named from "Timer A" to + * "Timer H". Timer A is the only one with watchdog support, so it is dedicated + * to the watchdog driver. This driver uses Timer B for sched_clock(), and + * Timer C for clockevents. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include <linux/clk.h> +#include <linux/clockchips.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/irqreturn.h> +#include <linux/sched_clock.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> + +enum { + TIMER_A, + TIMER_B, + TIMER_C, + TIMER_D, + TIMER_E, + TIMER_F, + TIMER_G, + TIMER_H, +}; + +#define CONTROL(t) ((t)*8) +#define COUNT(t) ((t)*8 + 4) + +static void __iomem *timer_base; +static u32 ticks_per_jiffy; + +static void digicolor_clkevt_mode(enum clock_event_mode mode, + struct clock_event_device *clk) +{ + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: + writeb(0, timer_base + CONTROL(TIMER_C)); + writel(ticks_per_jiffy, timer_base + COUNT(TIMER_C)); + writeb(0x21, timer_base + CONTROL(TIMER_C)); + break; + case CLOCK_EVT_MODE_ONESHOT: + writeb(0, timer_base + CONTROL(TIMER_C)); + writeb(0x11, timer_base + CONTROL(TIMER_C)); + break; + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_SHUTDOWN: + default: + writeb(0, timer_base + CONTROL(TIMER_C)); + break; + } +} + +static int digicolor_clkevt_next_event(unsigned long evt, + struct clock_event_device *unused) +{ + writeb(0, timer_base + CONTROL(TIMER_C)); + writel(evt, timer_base + COUNT(TIMER_C)); + writeb(0x11, timer_base + CONTROL(TIMER_C)); + + return 0; +} + +static struct clock_event_device digicolor_clockevent = { + .name = "digicolor_tick", + .rating = 340, + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, + .set_mode = digicolor_clkevt_mode, + .set_next_event = digicolor_clkevt_next_event, +}; + + +static irqreturn_t digicolor_timer_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *evt = (struct clock_event_device *)dev_id; + + evt->event_handler(evt); + + return IRQ_HANDLED; +} + +static struct irqaction digicolor_timer_irq = { + .name = "digicolor_timerC", + .flags = IRQF_TIMER | IRQF_IRQPOLL, + .handler = digicolor_timer_interrupt, + .dev_id = &digicolor_clockevent, +}; + +static u64 digicolor_timer_sched_read(void) +{ + return ~readl(timer_base + COUNT(TIMER_B)); +} + +static void __init digicolor_timer_init(struct device_node *node) +{ + unsigned long rate; + struct clk *clk; + int ret, irq; + + timer_base = of_iomap(node, 0); + if (!timer_base) { + pr_err("Can't map registers"); + return; + } + + irq = irq_of_parse_and_map(node, TIMER_C); + if (irq <= 0) { + pr_err("Can't parse IRQ"); + return; + } + + clk = of_clk_get(node, 0); + if (IS_ERR(clk)) { + pr_err("Can't get timer clock"); + return; + } + clk_prepare_enable(clk); + rate = clk_get_rate(clk); + + writeb(0, timer_base + CONTROL(TIMER_B)); + writel(~0, timer_base + COUNT(TIMER_B)); + writeb(1, timer_base + CONTROL(TIMER_B)); + + sched_clock_register(digicolor_timer_sched_read, 32, rate); + clocksource_mmio_init(timer_base + COUNT(TIMER_B), node->name, + rate, 340, 32, clocksource_mmio_readl_down); + + ticks_per_jiffy = DIV_ROUND_UP(rate, HZ); + + ret = setup_irq(irq, &digicolor_timer_irq); + if (ret) + pr_warn("failed to setup timer irq %d (%d)\n", irq, ret); + + digicolor_clockevent.cpumask = cpu_possible_mask; + digicolor_clockevent.irq = irq; + + clockevents_config_and_register(&digicolor_clockevent, rate, 0, + 0xffffffff); +} +CLOCKSOURCE_OF_DECLARE(conexant_digicolor, "cnxt,cx92755-timer", + digicolor_timer_init); -- 2.1.4
next prev parent reply other threads:[~2015-01-08 19:40 UTC|newest] Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-01-08 19:39 [PATCH v2 0/8] ARM: Conexant Digicolor CX92755 SoC support Baruch Siach 2015-01-08 19:39 ` Baruch Siach 2015-01-08 19:39 ` Baruch Siach 2015-01-08 19:39 ` [PATCH v2 1/8] ARM: initial support for Conexant Digicolor CX92755 SoC Baruch Siach 2015-01-08 19:39 ` Baruch Siach 2015-01-08 19:39 ` [PATCH v2 2/8] ARM: digicolor: add low level debug support Baruch Siach 2015-01-08 19:39 ` Baruch Siach 2015-01-08 19:39 ` [PATCH v2 3/8] ARM: digicolor: add minimal device tree description Baruch Siach 2015-01-08 19:39 ` Baruch Siach 2015-01-08 22:41 ` Arnd Bergmann 2015-01-08 22:41 ` Arnd Bergmann 2015-01-08 22:41 ` Arnd Bergmann 2015-01-09 11:46 ` Mark Rutland 2015-01-09 11:46 ` Mark Rutland 2015-01-09 11:46 ` Mark Rutland 2015-01-11 9:38 ` Baruch Siach 2015-01-11 9:38 ` Baruch Siach 2015-01-11 9:38 ` Baruch Siach 2015-01-08 19:40 ` [PATCH v2 4/8] irqchip: devicetree: document Conexant Digicolor irq binding Baruch Siach 2015-01-08 19:40 ` Baruch Siach 2015-01-09 11:50 ` Mark Rutland 2015-01-09 11:50 ` Mark Rutland 2015-01-09 11:50 ` Mark Rutland 2015-01-11 11:21 ` Baruch Siach 2015-01-11 11:21 ` Baruch Siach 2015-01-11 11:21 ` Baruch Siach 2015-01-09 15:12 ` Sergei Shtylyov 2015-01-09 15:12 ` Sergei Shtylyov 2015-01-11 11:29 ` Baruch Siach 2015-01-11 11:29 ` Baruch Siach 2015-01-08 19:40 ` [PATCH v2 5/8] irqchip: Conexant CX92755 interrupts controller driver Baruch Siach 2015-01-08 19:40 ` Baruch Siach 2015-01-08 19:40 ` [PATCH v2 6/8] clocksource: devicetree: document Conexant Digicolor timer binding Baruch Siach 2015-01-08 19:40 ` Baruch Siach 2015-01-08 19:40 ` Baruch Siach [this message] 2015-01-08 19:40 ` [PATCH v2 7/8] clocksource: driver for Conexant Digicolor SoC timer Baruch Siach 2015-01-08 19:40 ` [PATCH v2 8/8] ARM: devicetree: document supported Conexant Digicolor SoC Baruch Siach 2015-01-08 19:40 ` Baruch Siach 2015-01-08 22:46 ` [PATCH v2 0/8] ARM: Conexant Digicolor CX92755 SoC support Arnd Bergmann 2015-01-08 22:46 ` Arnd Bergmann 2015-01-08 22:46 ` Arnd Bergmann 2015-01-11 11:33 ` Baruch Siach 2015-01-11 11:33 ` Baruch Siach 2015-01-11 15:49 ` Arnd Bergmann 2015-01-11 15:49 ` Arnd Bergmann 2015-01-11 15:49 ` Arnd Bergmann 2015-01-28 22:33 ` Paul Bolle 2015-01-28 22:33 ` Paul Bolle 2015-01-28 22:33 ` Paul Bolle 2015-01-28 22:41 ` Baruch Siach 2015-01-28 22:41 ` Baruch Siach 2015-01-28 22:41 ` Baruch Siach 2015-01-28 22:52 ` Paul Bolle 2015-01-28 22:52 ` Paul Bolle 2015-01-28 22:52 ` Paul Bolle
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